Voltage Detection Circuit for Memory Package Data Loading

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Solution Overview

Problem

Nonvolatile memory devices storing option information in CAM cells face malfunctions during data loading due to voltage stabilization delays, leading to errors when the memory chip's voltage has not yet stabilized, as external controllers cannot determine when the memory chip's voltage is stable.

Innovation Solution

A package apparatus with a voltage detection circuit that compares the memory chip's voltage to a reference voltage, using resistors and comparators to generate a control signal for the controller to input a command for data loading only when the memory chip's voltage has stabilized, ensuring data is loaded in a stable voltage state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the external controller inputs a command to load data from the CAM cell after its voltage stabilizes, then the controller can operate normally, but the memory chip voltage may not have stabilized yet causing data loading errors

Engineering Contradiction:
Improvedata loading reliabilityVSAvoidvoltage stabilization time difference
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements a feedback mechanism where the memory chip monitors its own voltage status and sends a ready signal to the external controller when voltage stabilization is complete. This allows the controller to know exactly when it is safe to input commands, eliminating the timing mismatch between controller readiness and memory chip readiness.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces an intermediary voltage status signal and ready signal as mediators between the external controller and memory chip. These signals act as communication intermediaries that convey the voltage stabilization status, allowing the controller to synchronize its operations with the actual voltage status of the memory chip.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If the data loading operation is performed before the memory chip voltage stabilizes, then the system can operate faster, but errors occur in reading the CAM cell data

Engineering Contradiction:
Improvesystem operation speedVSAvoiddata reading accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by having the memory chip begin voltage stabilization preparation immediately upon power application, and by having the external controller begin its voltage stabilization process earlier. The ready signal mechanism ensures that data loading operations are scheduled only after voltage stabilization is confirmed, preventing errors while maintaining efficient operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The feedback mechanism through ready signals provides real-time information about voltage stabilization status, allowing the system to proceed with data loading as soon as voltage stability is achieved. This minimizes the waiting time while ensuring data reading accuracy is not compromised.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Prevents errors in loading data from CAM cells by ensuring that data is loaded only after the memory chip's voltage has stabilized, thereby maintaining data integrity and reliability.

Implementation Method 1

A package apparatus with a voltage detection circuit that compares the memory chip's voltage to a reference voltage, using resistors and comparators to generate a control signal

Methodology Applied
Scientific EffectVoltage comparison: Ohm's Law

Data Source

PatentUS8310882B2Package apparatus and method of operating the same
Publication Date: 2012.11.13 SK HYNIX INC
  • US8310882B2 patent drawing
  • US8310882B2 patent drawing
  • US8310882B2 patent drawing

AI summary

A package apparatus includes at least one memory chip, a voltage detection circuit configured to make a determination of whether a voltage supplied to the memory chip is a specific voltage or higher, and a controller configured to control an operation of the memory chip based on a result of the determination.