Internal Voltage Divider Layout for Compact Multi-Voltage Generation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing number of internal voltage generator circuits in semiconductor memory devices due to varied circuit component sizes and low power consumption requirements leads to increased chip area, limiting space for other circuitry and introducing noise interference.
Innovation Solution
The use of N+ resistors with lower sheet resistance, which are fabricated using fewer processes, reduces production costs and power consumption, and grouping resistors and selector switches together minimizes space and noise influence, allowing for more efficient voltage generation and reduced wiring complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of internal voltage generator circuits is increased to provide more internal voltages for varied circuit component sizes, then voltage supply capability is improved, but chip area is increased
Solution Approach 1:
The patent combines multiple voltage generator circuits into a single integrated circuit that can provide multiple different internal voltages. This is achieved by using a single resistor circuit with multiple taps and selector switches that can selectively connect different voltage division ratios to output terminals, thereby generating multiple internal voltages from one compact circuit structure.
Solution Approach 2:
The voltage generator circuit is designed to perform multiple functions by generating various internal voltages (such as read voltages, program voltages, erase voltages) from a single circuit. The resistor circuit with selectable taps allows the same physical circuit to provide different voltage levels depending on which taps are selected, making the circuit universal for multiple voltage generation needs.
2Adaptability or versatility
If the number of internal voltage generator circuits is increased, then voltage supply capability is improved, but noise interference is increased
Solution Approach 1:
By merging multiple voltage generator functions into a single circuit, the patent reduces the total number of separate circuits on the chip. This consolidation decreases the overall noise generation and interference that would result from having multiple independent voltage generator circuits operating simultaneously across different chip locations.
3Ease of manufacture
If N- resistors with higher sheet resistance are used, then production cost is reduced, but power consumption is increased
Solution Approach 1:
The patent changes the resistance parameter from high (N-) to low (N+) sheet resistance. This parameter change reduces power consumption because lower resistance allows for lower operating currents to achieve the same voltage division ratios, while still maintaining the ability to generate the required internal voltages through the selector switch mechanism.
4Area of stationary object
If resistors and selector switches are grouped together, then chip area is reduced, but wiring complexity is increased
Solution Approach 1:
The patent merges the resistor circuit and selector switches into a closely integrated structure where the switches directly control the selection of taps from the resistor voltage division network. This grouping reduces the physical distance between related components and minimizes the wiring required to connect them, despite the increased functional integration.
Data Source
AI summary
An apparatus is described. The apparatus according to an embodiment includes a voltage dividing resistor circuit formed on a semiconductor substrate and including first and second resistors and first and second selector switches. The first and second resistors and the first and second selector switches are arranged with one of first and second layouts. The first layout is such that the first and second selector switches are placed between the first and second resistors. The second layout is such that the first and second resistors are placed between the first and second selector switches.