Voltage Mode Differential Driver With Parasitic Capacitance Cancellation
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Solution Overview
Problem
High-speed digital communication requires driver circuits that balance high operating speeds with low power consumption, as conventional current mode drivers consume excessive power and voltage mode drivers suffer from poor harmonic response and line impedance matching.
Innovation Solution
A high-speed, low-power voltage mode differential signal driver apparatus utilizing a cross-coupled transistor pair with an RC impedance circuit to cancel parasitic capacitance, improving edge rate performance while maintaining low power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If current mode drivers are used, then good harmonic response and line impedance matching are achieved, but power consumption increases
Solution Approach 1:
The driver is divided into two functional segments: a voltage mode output stage for low power consumption and a current mode buffer stage for driving the RC impedance circuit. This segmentation allows each segment to optimize for its specific function while working together to achieve both low power and good signal integrity.
Solution Approach 2:
The RC impedance circuit acts as an intermediary between the voltage mode output stage and the transmission line. It provides negative impedance to cancel parasitic capacitance, enabling the voltage mode driver to achieve harmonic response and impedance matching characteristics traditionally associated with current mode drivers.
2Use of energy by moving object
If voltage mode drivers are used, then power consumption is reduced, but harmonic response and line impedance matching deteriorate
Solution Approach 1:
The RC impedance circuit serves as an intermediary that compensates for the deficiencies of voltage mode drivers. By providing negative impedance, it cancels parasitic capacitance effects, thereby improving harmonic response and impedance matching without requiring the driver itself to be in current mode.
Solution Approach 2:
The impedance characteristics of the driver are dynamically adjusted through the RC circuit, which presents a negative impedance that varies with frequency. This parameter change enables the system to achieve better harmonic response and impedance matching across the operating bandwidth.
3Speed
If data rates are increased, then communication speed improves, but parasitic capacitance effects worsen edge rate performance
Solution Approach 1:
The parasitic capacitance, which normally degrades edge rate performance at high speeds, is converted into a benefit through the RC impedance circuit. The circuit is designed to present a negative impedance that specifically targets and cancels the parasitic capacitance, turning the harmful effect into an advantage for high-speed operation.
Solution Approach 2:
The RC impedance circuit provides preliminary anti-action by pre-compensating for parasitic capacitance effects before they can degrade the signal. The negative impedance is configured to counteract the capacitive loading, preparing the circuit for high-speed operation and preventing edge rate deterioration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution supports high operating speeds and improved edge rate performance while maintaining low power consumption, effectively addressing the limitations of conventional driver circuits.
Implementation Method 1
the RC impedance circuit appears as a negative impedance which can be used to cancel out some or all of the stray or parasitic capacitance of a driven circuit
Implementation Method 2
The driver output circuit includes first and second circuit branches individually including two transistors, an intervening resistor and a current source
Data Source
AI summary
Differential voltage mode signal driver circuitry is presented in which a differential current mode amplifier input stage provides a differential signal, and an output stage includes a pair of bipolar transistors receiving the differential signal and being connected in series with a pair of cross-coupled field effect transistors that are coupled to corresponding current sources, where a negative impedance circuit is connected between the field effect transistors to substantially cancel a parasitic capacitance of a driven output circuit.


