Voltage Droop Clock Division for Stable Digital Circuits
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Solution Overview
Problem
Digital circuit systems face instability and errors due to abrupt voltage drops or noise in the supply voltage, requiring a device that can promptly adjust the clock signal to maintain stable operations.
Innovation Solution
A frequency adjusting device with a voltage droop detector and frequency divider that down-converts the clock signal when the supply voltage becomes unstable, and includes a mask clock generator to suppress surges and noises during the down-conversion process, allowing flexible adjustment of the threshold voltage based on the critical path of the digital circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the clock signal frequency is increased to meet product function demands, then the processing speed and product performance are improved, but the digital circuit system becomes more sensitive to supply voltage instability, causing delay and errors
Solution Approach 1:
The patent implements dynamic frequency adjustment by monitoring supply voltage stability in real-time and adjusting the clock signal frequency accordingly. When voltage instability is detected, the system automatically reduces the clock frequency to prevent errors, and restores it when voltage stabilizes. This dynamic adaptation resolves the contradiction by making the system flexible rather than fixed, allowing high performance during stable operation while maintaining reliability during voltage disturbances.
2Reliability
If a frequency adjusting device is added to respond to voltage disturbances, then the reliability of digital circuit operation is improved, but the device complexity increases
Solution Approach 1:
The frequency adjusting device operates autonomously by continuously monitoring its own operating conditions (supply voltage stability) and self-adjusting the clock frequency without external intervention. The device includes a voltage detection mechanism and an automatic frequency control loop that responds to voltage disturbances and restores normal operation automatically, eliminating the need for complex external control systems or manual intervention.
Solution Approach 2:
The system implements a feedback mechanism where the supply voltage stability is continuously monitored and fed back to the frequency control logic. When voltage instability is detected, the feedback signal triggers frequency reduction, and when voltage stabilizes, the feedback signal restores the original frequency. This closed-loop feedback control achieves reliable operation with relatively simple device architecture.
3Loss of time
If the clock signal frequency is rapidly adjusted in response to voltage droop, then the response speed to voltage disturbances is improved, but noise and surges may be introduced during the down-conversion process
Solution Approach 1:
The system performs preliminary detection of voltage instability before it causes critical damage to the digital circuit operation. By monitoring supply voltage continuously and detecting droop conditions early, the system can proactively reduce the clock frequency before errors occur, rather than waiting for failures to happen. This preliminary action allows rapid response while avoiding the need for aggressive frequency switching that would generate noise and surges.
Data Source
AI summary
A frequency adjusting device includes a voltage droop detector and a frequency divider. The voltage droop detector compares a supply voltage with a lower threshold voltage to output a comparison result. When the supply voltage is greater than the threshold voltage, the frequency divider outputs a result of dividing a basic clock signal by a first value as a clock signal. When the supply voltage is smaller than the threshold voltage, the frequency divider outputs a result of dividing the basic clock signal by a second value as the clock signal.