Voltage Droop Monitoring Circuit for Adaptive Clock Modulation

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Solution Overview

Problem

Conventional semiconductor circuits face increased power consumption due to overprovisioning of voltage to account for worst-case scenarios, leading to reduced product competitiveness and inefficient energy use.

Innovation Solution

A voltage droop monitoring circuit that includes a ring oscillator circuit block, counter, and droop detector to rapidly and accurately detect voltage drops, allowing for adaptive clock modulation to maintain normal operation while reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If voltage is overprovisioned to account for worst-case scenarios, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improveoperational stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic voltage monitoring and adaptive clock modulation that adjusts circuit operation in real-time based on actual voltage conditions. Instead of static overprovisioning, the system dynamically adapts to voltage droop events, maintaining reliability only when necessary while reducing power consumption during normal operation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs a feedback mechanism where voltage droop is monitored and detected, triggering adaptive responses including clock frequency modulation. This closed-loop feedback system allows the circuit to respond to actual voltage conditions rather than relying on conservative static design margins, thereby reducing unnecessary power consumption while maintaining operational stability.

Inventive Principle:
Principle #23Feedback

2Reliability

If voltage is increased to maintain normal operation during voltage drops, then operational stability is improved, but power consumption increases

Engineering Contradiction:
Improveoperational stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent changes operational parameters dynamically by modulating clock frequency in response to voltage droop detection. Instead of increasing voltage to maintain operation, the system adjusts the clock frequency parameter to adapt to voltage conditions, thereby maintaining operational stability without the power consumption penalty of voltage increase.

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If voltage droop monitoring and adaptive clock modulation are implemented, then power consumption is reduced, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent segments the monitoring and control functions into distinct modular components: voltage droop monitoring circuitry, detection logic, and clock modulation circuitry. This segmentation allows for targeted implementation of power management features without requiring complete system redesign, thereby reducing the overall complexity burden while achieving power consumption reduction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary adaptive clock modulation mechanism that bridges voltage monitoring and circuit operation. This intermediary layer translates voltage droop detection into appropriate clock frequency adjustments, providing a controlled interface between monitoring and execution functions, thereby managing complexity through structured intermediation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11531385B2Voltage droop monitoring circuits, system-on chips and methods of operating the system-on chips
Publication Date: 2022.12.20 SAMSUNG ELECTRONICS CO LTD
  • US11531385B2 patent drawing
  • US11531385B2 patent drawing
  • US11531385B2 patent drawing

AI summary

In one embodiment, the voltage droop monitoring circuit includes a ring oscillator circuit block configured to generate a plurality of oscillation signals and configured to output a selected oscillation signal from one of the plurality of oscillation signals based on a first control signal. The first control signal is based on a power supply voltage of a functional circuit block. The voltage droop monitoring circuit further includes a counter configured to generate a count value based on the selected oscillation signal, and a droop detector configured detect droop in the power supply voltage of the functional circuit block based on the count value and at least one threshold value.