Supply Voltage Event Detection for Clock Timing Correction

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Solution Overview

Problem

Computing devices, especially mobile devices, face issues with supply voltage undershoot and ringing due to high current loads, leading to potential equipment damage and computing errors, which existing technologies fail to adequately address.

Innovation Solution

The implementation of sensor circuitry and control circuitry that detect supply voltage events, such as load steps or releases, and perform corrective actions like adjusting clock cycle time or frequency to mitigate voltage transients, using a combination of sensors like high-pass filters, low-pass filters, and voltage-controlled oscillators to manage supply voltage fluctuations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high current loads are used to improve processing performance, then productivity is improved, but supply voltage undershoot and ringing occur causing reliability to deteriorate

Engineering Contradiction:
Improveprocessing performanceVSAvoidsupply voltage stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The sensor circuitry detects supply voltage events (undershoot, ringing, load release events) and triggers corrective actions before logic timing failures occur. The system proactively monitors voltage conditions and initiates clock frequency adjustments in advance to prevent computing errors and equipment damage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system continuously monitors supply voltage through sensor circuitry and uses this feedback to dynamically adjust clock frequency. When voltage events are detected, the control circuitry modifies operating frequency to maintain reliability, creating a closed-loop control system that adapts to real-time power supply conditions.

Inventive Principle:
Principle #23Feedback

2Reliability

If traditional voltage margin approaches are used to ensure reliability, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improvelogic timing reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

Instead of using fixed voltage margins, the system dynamically adjusts clock frequency based on real-time supply voltage conditions. This dynamic adaptation allows the system to maintain reliability under varying load conditions without requiring excessive voltage headroom, thereby reducing overall power consumption while ensuring logic timing correctness.

Inventive Principle:
Principle #15Dynamics

3Ease of operation

If load release events are allowed to occur naturally to improve ease of operation, then ease of operation is improved, but supply voltage transients increase causing harmful factors to worsen

Engineering Contradiction:
Improvecomponent activation/deactivationVSAvoidsupply voltage transients
Core Design Contradiction:
Ease of operationVSObject-generated harmful factors

Solution Approach 1:

The system converts the harmful effect of load release transients into useful information by detecting them with sensor circuitry. The detected transients trigger corrective clock frequency adjustments that prevent logic timing failures, transforming what would be harmful voltage spikes into opportunities for adaptive control that maintains system reliability.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS11736111B2Detecting power supply noise events and initiating corrective action
Publication Date: 2023.08.22 APPLE INC
  • US11736111B2 patent drawing
  • US11736111B2 patent drawing
  • US11736111B2 patent drawing

AI summary

Techniques are disclosed relating to detecting supply voltage events and performing corrective actions. In some embodiments, an apparatus includes sensor circuitry and control circuitry. In some embodiments, the sensor circuitry is configured to monitor supply voltage from a power supply and detect a load release event that includes an increase in the supply voltage that meets one or more pre-determined threshold parameters. In some embodiments, the control circuitry is configured to increase clock cycle time for operations performed by circuitry powered by the supply voltage during a time interval, wherein the time interval corresponds to ringing of the supply voltage that reduces the supply voltage and results from the load release event. In some embodiments, the disclosed techniques may reduce transients in supply voltage (which may avoid equipment damage and computing errors) and may allow for reduced voltage margins (which may reduce overall power consumption).