Voltage Generation Circuitry for Memory Bitline Arrays

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Solution Overview

Problem

Conventional memory cell arrays face challenges in providing consistent voltage regulation across multiple buffers and efficiently routing power, especially due to inherent capacitance issues, which affects the efficiency and reliability of memory operations.

Innovation Solution

The implementation of voltage generation circuitry that applies different voltages to groups of bitlines, allowing for the sharing of electrical charge to generate a reference voltage, thereby addressing the capacitance challenges and improving voltage regulation across the memory cell array.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional memory cell arrays use standard voltage generation, then the structure is simple, but voltage regulation consistency deteriorates due to inherent capacitance issues

Engineering Contradiction:
Improvevoltage regulation consistencyVSAvoidvoltage generation circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the bitlines into multiple groups and assigns different voltage levels to each group. This segmentation allows each group to have optimized voltage regulation that accounts for its specific capacitance characteristics, thereby improving overall voltage regulation consistency without requiring a completely complex redesign of the entire voltage generation system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different voltage levels are applied to different groups of bitlines based on their specific capacitance requirements. This local differentiation ensures that each bitline group receives the appropriate voltage regulation tailored to its characteristics, improving reliability while maintaining manageable circuit complexity through localized optimization rather than uniform treatment.

Inventive Principle:
Principle #3Local quality

2Reliability

If voltage generation circuitry is added to improve voltage regulation, then voltage regulation consistency improves, but device complexity increases

Engineering Contradiction:
Improvevoltage regulation consistencyVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The voltage generation circuitry is designed to serve multiple functions: it generates different voltage levels for different bitline groups, regulates voltage according to capacitance requirements, and maintains compatibility with existing memory cell array structures. This multi-functionality improves voltage regulation consistency while minimizing the increase in overall device complexity by consolidating multiple needs into a unified circuit design.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If charge sharing is used to generate reference voltage, then capacitive loading is reduced, but voltage generation complexity increases

Engineering Contradiction:
Improvememory operation efficiencyVSAvoidvoltage generation process
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The voltage generation circuit utilizes charge sharing between bitline groups to generate reference voltages. This self-service mechanism allows the circuit to leverage its own structural elements (the bitlines themselves) to create the necessary voltage references without requiring external voltage generation components, thereby improving memory operation efficiency while keeping the voltage generation process relatively simple.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the efficiency of memory operations by minimizing capacitive loading and ensuring consistent voltage levels, even under high-frequency operations, thus improving data retention and operational reliability.

Implementation Method 1

The implementation of voltage generation circuitry that applies different voltages to groups of bitlines, allowing for the sharing of electrical charge to generate a reference voltage

Methodology Applied
Scientific EffectElectrical charge sharing: Capacitance

Data Source

PatentUS8659956B2Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same
Publication Date: 2014.02.25 OVONYX MEMORY TECHNOLOGY LLC
  • US8659956B2 patent drawing
  • US8659956B2 patent drawing
  • US8659956B2 patent drawing

AI summary

A method of generating a voltage on an integrated circuit device comprising a memory cell array including (i) a plurality of memory cells, arranged in a matrix of rows and columns, and (ii) a plurality of bit lines, wherein each bit line includes a plurality of memory cells. The integrated circuit device further comprises voltage generation circuitry, coupled to a plurality of the bit lines, to (i) apply a first voltage to a first group of associated bit lines, (ii) apply a second voltage to a second group of associated bit lines, (iii) generate a third voltage by connecting the first group of associated bit lines and the second group of associated bit lines, and (iv) output the third voltage. Also, disclosed is a method of operation and/or control of such an integrated circuit device as well as such voltage generation circuitry.