Voltage Generator with Auxiliary Controller for Low Power Memory
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Solution Overview
Problem
Conventional voltage generators for semiconductor memory devices face challenges in maintaining stable bit line precharge and cell plate voltages under low power supply conditions, leading to increased standby and operation currents, which can cause erroneous operations and power inefficiencies.
Innovation Solution
A voltage generator design that incorporates PMOS and NMOS transistors with low threshold voltages at the driver terminal, along with an auxiliary driving controller to synchronize the turning on and off of the voltage driver, using bias signals and driving signals to manage the pull-up and pull-down operations effectively, thereby minimizing standby and operation currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If PMOS and NMOS transistors with low threshold voltages are used at the driver terminal to improve drivability, then the drivability is improved, but the standby current increases
Solution Approach 1:
The patent applies dynamic control by introducing an auxiliary driving controller that dynamically adjusts the operation of the voltage driver based on real-time voltage level detection. The controller synchronizes the turning on and off of the driver, making the system adaptive rather than static, thereby resolving the contradiction between maintaining low threshold voltage for drivability and minimizing standby current through controlled operation periods
Solution Approach 2:
The patent implements feedback mechanisms through the auxiliary driving controller that monitors the voltage levels at the driver terminal and adjusts the driving signals accordingly. This feedback loop ensures that the low threshold voltage transistors are only active when needed for drivability, while being turned off during standby periods to minimize current leakage, thus resolving the contradiction between improved drivability and reduced standby current
2Productivity
If core voltage is decreased due to high integration, then the integration density is improved, but the drivability of bit line precharge voltage and cell plate voltage decreases
Solution Approach 1:
The patent introduces an auxiliary driving controller as an intermediary component between the core voltage source and the voltage driver. This intermediary amplifies and conditions the core voltage signal to provide sufficient driving capability despite the low core voltage level, thereby enabling high integration density while maintaining adequate drivability through the mediating control function
Solution Approach 2:
The patent changes the operational parameters of the voltage driver by introducing synchronized control signals that adjust the timing and magnitude of the driving action. By modifying these parameters through the auxiliary controller, the system achieves effective voltage driving capability even with decreased core voltage, thus resolving the contradiction between integration density and drivability
3Device complexity
If the voltage driver turns on and off asynchronously, then the circuit operation is simple, but erroneous operation occurs due to timing mismatch
Solution Approach 1:
The patent employs feedback through the auxiliary driving controller that monitors the voltage driver's state and provides synchronized control signals. This feedback mechanism ensures that the turning on and off operations are properly coordinated in time, preventing erroneous operations while maintaining relatively simple circuit architecture through intelligent control rather than complex hardwired logic
Solution Approach 2:
The patent applies preliminary action by having the auxiliary driving controller prepare and issue synchronized control signals before the voltage driver actually switches states. This preliminary coordination ensures proper timing alignment of the driver operations, preventing timing mismatches and erroneous operations while keeping the overall control structure relatively simple through proactive synchronization
Data Source
AI summary
A voltage generator includes a bias signal generator generating first to fourth bias signals using a reference voltage, the first to fourth bias signals having different voltage levels. A driving signal generator receives the first and third bias signals to generate a pull-up signal in response to a voltage level of an output terminal and receiving the second and fourth bias signals to generate a pull-down signal in response to a voltage level of the output terminal. A voltage driver pulls up and pulls down a voltage level of the output terminal in response to the respective pull-up and pull-down signals. An auxiliary driving controller disables the pull-up signal when the voltage level of the output terminal is greater than that of the reference voltage and the pull-down signal when the voltage level of the output terminal is less than that of the reference voltage.