Voltage Generator With Priority Logic for Stable Display Driving Voltages
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Solution Overview
Problem
Display devices require stable voltage levels for high-quality image display, but existing technologies struggle to maintain consistent voltage generation, leading to potential image quality issues.
Innovation Solution
A voltage generator with an input circuit, FIFO and priority logic, switching logic, and a voltage converter, utilizing a single inductor multiple output structure to generate multiple driving voltages with stable levels by prioritizing voltage requests and minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple voltage requests are handled simultaneously without priority logic, then all voltage levels can be generated, but voltage stability deteriorates due to conflicting requests
Solution Approach 1:
The FIFO buffer stores voltage requests in advance and processes them in a predetermined sequence, ensuring that voltage conversion requests are handled in an organized manner before conflicts arise, thereby maintaining voltage stability while avoiding complex real-time arbitration logic
Solution Approach 2:
The priority logic circuit acts as an intermediary between multiple voltage requests and the voltage converter, arbitrating conflicting requests by assigning priorities to different voltage outputs and selecting the highest priority request, thus resolving conflicts without requiring complex multi-request handling logic
2Reliability
If separate inductors are used for each voltage output, then each voltage can be optimized independently, but power consumption increases due to multiple inductors
Solution Approach 1:
Multiple voltage conversion operations share a single inductor resource through time-division multiplexing controlled by the priority logic, merging what would traditionally require separate inductors into one shared component, thereby reducing overall power consumption while maintaining efficient voltage conversion through optimized switching control
Solution Approach 2:
The single inductor serves multiple voltage conversion functions by being dynamically switched between different conversion paths based on priority logic decisions, allowing one component to perform the work of multiple dedicated inductors while reducing total energy consumption
3Reliability
If voltage conversion is delayed to handle higher priority requests, then voltage stability is maintained, but response time increases
Solution Approach 1:
Voltage requests are registered in advance in the FIFO buffer with timestamp information, allowing the system to process them in predetermined priority order without delaying the overall response, as the queuing action is performed preliminarily before actual conversion begins
Solution Approach 2:
The voltage converter operates in periodic switching cycles, with each cycle dedicated to a specific voltage conversion task determined by priority logic, ensuring that each voltage request receives timely attention within regular intervals while maintaining stable voltage levels through consistent periodic operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution ensures stable voltage levels are maintained, reducing image quality issues and power consumption, thereby enhancing display device performance.
Implementation Method 1
a voltage converter that converts an input voltage into first and second output voltages, respectively, in response to the plurality of switching signals
Data Source
AI summary
Disclosed is a voltage generator of a display device, which includes an input circuit that outputs a first request signal and a second request signal in response to first and second voltage data signals and first and second feedback voltages, a FIFO and priority logic that outputs one of first and second selection signals as an active level in synchronization with a clock signal when at least one of the first and second request signals is at an active level, switching logic that outputs a plurality of switching signals in response to one of the first and second selection signals, which is the active level, and a voltage converter that converts an input voltage into first and second output voltages, respectively, in response to the plurality of switching signals and outputs the first and second feedback voltages corresponding to the first and second output voltages, respectively. When the first and second request signals are simultaneously at the active level, the FIFO and priority logic outputs one of the first and second selection signals at the active level depending on a priority.