Voltage Generator Write Protection for Non-Volatile Memory
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Solution Overview
Problem
Conventional data processing systems lack effective protection against malicious tampering or erasure of data stored in non-volatile memory, particularly during malicious attacks or hacker intrusions, as they rely on electrical write protection mechanisms that can be circumvented.
Innovation Solution
A data processing system and method incorporating a physical write protection mechanism using a predetermined voltage generating circuit and a reference voltage generating circuit, where the reference voltage generator is disabled upon detection of an abnormal condition, preventing the generation of a target voltage level required for writing or erasing operations, thereby blocking malicious operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a write protection mechanism is implemented to prevent malicious tampering, then data security is improved, but the system complexity increases due to additional voltage generating circuits and control mechanisms
Solution Approach 1:
The voltage generating system is segmented into multiple independent circuits: a first voltage generating circuit for normal operations and a second voltage generating circuit for write/erase operations. This segmentation allows the system to maintain simple normal operations while enabling protected write operations only when needed, thus improving data security without significantly increasing overall system complexity.
Solution Approach 2:
The system performs preliminary verification by detecting abnormal conditions before allowing write operations. The write protection mechanism is activated in advance by detecting abnormal conditions, and only after verification does the system enable the second voltage generating circuit. This preliminary action ensures data security is maintained while avoiding unnecessary complexity in normal operation modes.
2Adaptability or versatility
If the target voltage level is generated for writing or erasing operations, then the memory device can be updated, but the risk of malicious tampering increases
Solution Approach 1:
The system dynamically controls the enablement of the second voltage generating circuit based on detected abnormal conditions. The circuit is enabled only when abnormal conditions are detected and verification is complete, and disabled otherwise. This dynamic control allows the memory device to be updated when needed while minimizing the window of opportunity for malicious tampering, thus balancing adaptability with security.
Solution Approach 2:
The system introduces an intermediary verification mechanism between the request for write operation and the actual generation of target voltage level. The abnormal condition detection and verification process acts as an intermediary that must be satisfied before the second voltage generating circuit is enabled. This intermediary layer prevents malicious tampering while maintaining legitimate memory update capabilities.
3Speed
If the voltage generator is continuously enabled to allow quick write operations, then operation speed is improved, but the vulnerability to malicious attacks increases
Solution Approach 1:
The system employs periodic enablement of the second voltage generating circuit based on detected abnormal conditions rather than continuous enablement. The circuit is enabled periodically only when abnormal conditions are detected and verification is complete, creating a controlled time window for write operations. This periodic action maintains operation speed for legitimate updates while significantly reducing vulnerability to malicious attacks.
Data Source
AI summary
A data processing system includes a memory device, a predetermined voltage generating circuit and a reference voltage generating circuit. The memory device stores system data and operates based on a system high voltage. The predetermined voltage generating circuit is coupled to the memory device and generates a predetermined voltage having a target voltage level according to a reference voltage. The target voltage level is the voltage level required for performing a write operation or an erase operation of the memory device. The reference voltage generating circuit generates the reference voltage. A voltage generator of the reference voltage generating circuit is enabled or disabled in response to a write protection signal, so as to selectively output the reference voltage. When the voltage generator is disabled, the reference voltage will not be output and the predetermined voltage having a target voltage level will accordingly not be generated.