Voltage ID Code Conversion to Avoid Invalid VRD Command Codes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing methods for setting core voltage in microprocessors are cumbersome and risky, requiring manual adjustment via jump wires or DIP switches, and do not ensure compatibility of voltage identification codes before and after conversion, potentially leading to damage or malfunction.
Innovation Solution
A method involving a binary converting unit and arithmetic processing unit to convert voltage identification codes, using a preset value to ensure compatibility with voltage regulation standards, such as VRD, by generating binary codes that fall outside specific ranges, thus avoiding special command codes and ensuring processor compatibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If manual voltage setting using jump wires or DIP switches is used, then voltage can be set according to microprocessor requirements, but the operation becomes cumbersome and risky, potentially causing damage to the microprocessor or motherboard
Solution Approach 1:
The system enables self-service voltage identification code conversion by automatically detecting the input voltage identification code and converting it to the corresponding output voltage identification code based on the voltage regulation standard, eliminating the need for manual intervention and potential human error in voltage setting operations
Solution Approach 2:
The patent replaces the mechanical system of jump wires and DIP switches with an automated digital conversion circuit that performs voltage identification code conversion through logical operations and arithmetic processing, thereby eliminating the harmful factors associated with manual mechanical adjustment
2Speed
If voltage identification code conversion is performed using simple digital circuit, then conversion speed is fast, but compatibility between different voltage regulation standards cannot be ensured
Solution Approach 1:
The patent changes the parameters of the conversion process by introducing arithmetic processing operations (addition, subtraction, comparison) alongside logical operations, allowing the system to adapt to different voltage regulation standards while maintaining fast conversion speed through efficient computational methods
Solution Approach 2:
The conversion circuit is designed with multi-functionality to support multiple voltage regulation standards (such as VRD 10.0, 10.1, 11.0, 12.0) by implementing a unified conversion methodology that can handle different standard requirements through configurable parameters and arithmetic processing
3Device complexity
If voltage identification code conversion is performed without considering special command codes, then conversion process is simple, but the converted code may correspond to special commands causing system malfunction
Solution Approach 1:
The patent applies preliminary action by first determining the special binary code range corresponding to special command codes before performing the actual conversion, and then using this information to guide the conversion process to avoid generating invalid codes that would cause system malfunction
Solution Approach 2:
The patent introduces an intermediary mechanism in the form of arithmetic processing operations that act as a mediator between the input and output voltage identification codes, ensuring that the conversion process accounts for special command codes and produces valid, safe output codes
Data Source
AI summary
The invention relates to a method for converting a voltage identification code includes the steps as follows. A special binary code range is obtained, and N special voltage identification codes corresponding to a special command are converted to N special binary codes under a converting relation, and the N special binary codes are used as the special binary code range. A first voltage identification code is converted to a corresponding first binary code under the converting relation. In addition, the first binary code and a first preset value are used to compute to obtain a second binary code, and the second binary code is not in the special binary code range.


