Voltage Interpolator Buffer Topology for Low-Power Accuracy
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Solution Overview
Problem
Existing techniques for interpolating two voltages often load the reference voltages, require significant power or additional area, or compromise on accuracy due to the need for high gain amplifiers.
Innovation Solution
The use of specific topologies for buffering amplifiers that cancel systematic error sources without relying on high gain, simplifying frequency compensation and reducing power consumption. This is achieved by biasing the amplifiers from the load current using an innovative feedback structure that eliminates the need for high impedance nodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional closed-loop amplifiers are used for voltage interpolation, then accuracy can be achieved, but power consumption increases and frequency compensation becomes complex
Solution Approach 1:
The patent changes the biasing parameters of the amplifiers by deriving tail currents from the load current itself rather than from independent high-impedance nodes. This parameter change allows the amplifiers to operate accurately while reducing power consumption and eliminating the need for complex frequency compensation circuits.
Solution Approach 2:
The amplifiers are designed to bias themselves from the load current flowing through the voltage divider. The tail current is automatically derived from the load current, making the system self-regulating and eliminating the need for external biasing circuits, thereby reducing power consumption and complexity.
2Measurement precision
If high gain amplifiers are used to cancel systematic errors, then accuracy improves, but device complexity and power consumption increase
Solution Approach 1:
The patent changes the operating parameters of the amplifiers by deriving bias currents from the load current. This allows systematic errors to be canceled through proper current matching rather than requiring high gain, thereby reducing amplifier complexity while maintaining accuracy.
Solution Approach 2:
The patent implements feedback by deriving the tail current from the load current through the voltage divider. This feedback mechanism automatically adjusts the biasing conditions to cancel systematic errors without requiring high gain amplifiers, thus reducing device complexity.
3Reliability
If independent biasing circuits are used for amplifiers, then amplifier performance can be optimized, but additional area and power are required
Solution Approach 1:
The patent merges the biasing function with the load current path. The tail current is derived from the same load current that flows through the voltage divider, combining two functions into one current path. This eliminates the need for separate biasing circuits, reducing both area and power consumption while maintaining amplifier performance.
Solution Approach 2:
The load current serves multiple functions: it provides the operating current for the voltage divider and simultaneously generates the tail current for biasing the amplifiers. This multi-functionality eliminates the need for dedicated biasing circuits, reducing circuit area and power consumption.
Data Source
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AI summary
Techniques for interpolating two voltages without loading them and without requiring significant power or additional area are described. The techniques include specific topologies for the buffering amplifiers that offer accuracy by cancelling systematic error sources without relying on high gain, thus simplifying the frequency compensation, and reducing power consumption. This can be achieved by biasing the amplifiers from the load current by an innovative feedback structure, which can remove the need for high impedance nodes inside the amplifiers.