Voltage Island Formation for 3D Many-Core Chip Heat Management
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Solution Overview
Problem
In 3D many-core chip multiprocessors, heat emission and power transmission challenges arise due to increased power consumption and limited heat dissipation, making it difficult to apply existing 2D power management techniques effectively.
Innovation Solution
A method is developed to form voltage islands by prioritizing zones based on heat emission characteristics, considering the structure of the 3D many-core chip, distance from the heat sink, and temperature differences, and adjusting task allocation to optimize power consumption and heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If 3D stacking technique is applied to increase integration, then device density and processing capability are improved, but power consumption and heat generation increase significantly
Solution Approach 1:
The chip is divided into multiple voltage zones (first voltage zone and second voltage zone) with different voltage levels. High-performance cores operate at high voltage while low-performance cores operate at low voltage, segmenting the power consumption and enabling selective optimization of each region.
Solution Approach 2:
Different regions of the chip are assigned different voltage levels based on their performance requirements. The first voltage zone provides high voltage for high-performance cores, while the second voltage zone provides low voltage for low-performance cores, creating local quality differences in power supply.
2Productivity
If 3D stacking technique is applied to enhance integration, then device density is improved, but heat emission and dissipation become more difficult
Solution Approach 1:
The chip is segmented into multiple voltage zones that are further divided into multiple voltage islands. Each voltage island can be independently controlled and optimized for heat dissipation, allowing thermal management at a finer granularity than the entire chip.
Solution Approach 2:
The patent introduces a vertical dimension for voltage zone separation in addition to the horizontal layout. By stacking voltage zones vertically and creating multiple voltage islands, the patent enables independent thermal management in the vertical dimension, facilitating heat dissipation in 3D stacked architecture.
3Loss of energy
If existing 2D power management techniques are applied to 3D many-core chip, then power consumption can be reduced, but heat emission and power transmission stability become problematic
Solution Approach 1:
The power transmission network is segmented into multiple independent voltage islands, each with its own power supply and control. This segmentation allows each island to be optimized for both power consumption and transmission stability, preventing the propagation of power fluctuations across the entire chip.
Solution Approach 2:
The patent extends power management from 2D planar layout to 3D vertical stacking by creating multiple voltage islands in different layers. This vertical dimension enables independent power control for each island, improving both energy efficiency and transmission stability through spatial separation of power domains.
Data Source
AI summary
Provided is a method of forming a voltage island for a 3D many-core chip multiprocessor, the method including setting the priority of a voltage zone based on the heat emission characteristic of the voltage zone; and forming a voltage island by using the priority.