Voltage Level Conversion Circuit for Fast, Stable Output
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current voltage converters are limited by parasitic capacitors, leading to slow operation speeds and can generate leakage currents and unstable output voltages due to parasitic capacitors and unstable power supply conditions.
Innovation Solution
A voltage level conversion circuit comprising N-type driving transistors, a voltage transmission circuit, a current source, and connection transistors, which transmit input voltages through sources and drains to prevent leakage currents and stabilize output voltages by controlling transistors with enabling voltages, thereby reducing parasitic capacitor effects and ensuring stable operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional voltage converters are used, then voltage level conversion is achieved, but operation speed is limited due to parasitic capacitors
Solution Approach 1:
The patent divides the voltage conversion function into two separate circuits: a first voltage conversion circuit for converting first input voltage to second input voltage, and a second voltage conversion circuit for converting second input voltage to output voltage. This segmentation allows each circuit to be optimized independently, reducing the impact of parasitic capacitors on overall operation speed.
Solution Approach 2:
The patent introduces an intermediate voltage stage (second input voltage) that acts as a mediator between the input and output voltage levels. This intermediate stage breaks the direct conversion path, reducing the voltage swing across parasitic capacitors and thereby improving operation speed.
2Reliability
If voltage converters operate with unstable power supply conditions, then voltage conversion continues, but output voltage becomes unstable
Solution Approach 1:
The patent employs feedback mechanisms where the output voltage of the first voltage conversion circuit serves as the input to the second voltage conversion circuit. This cascaded feedback structure ensures that any instability in the power supply is progressively corrected through each stage, maintaining stable output voltage even under unstable power supply conditions.
Solution Approach 2:
The patent designs the voltage conversion circuits with inherent buffering capabilities that cushion against power supply fluctuations before they can affect the output. The intermediate voltage stage acts as a buffer that isolates output variations from input power supply instability.
3Reliability
If voltage converters are used for signal transmission between different voltage levels, then voltage conversion is achieved, but leakage currents are generated due to incomplete transistor turn-off
Solution Approach 1:
The patent segments the voltage conversion into two independent stages, each with its own transistor switches. This segmentation allows each stage to be fully turned off independently, preventing leakage currents from propagating through the entire conversion path and improving signal transmission accuracy.
Solution Approach 2:
The patent ensures continuous and complete switching action in each voltage conversion stage by properly timing the enable signals for both circuits. This continuous complete switching prevents partial conduction states that would generate leakage currents, maintaining accurate signal transmission.
Data Source
AI summary
The present invention discloses a voltage level conversion circuit. A first and a second N-type driving transistors turn on when a first power voltage source supplies a high state voltage. A voltage transmission circuit transmits a first and a second input voltages having opposite levels to sources of the first and the second N-type driving transistors. A current source operates according to a second supply voltage source and has a first and a second output terminals. A first and a second connection transistors respectively couple between the drain of the first N-type driving transistor and the second output terminal and between the drain of the second N-type driving transistor and the first output terminal. The first and the second connection transistors turn on and off when the first voltage supply source supplies the high state voltage and a low state voltage.