Voltage Level Shifting Circuit for Low Latency Data Transmission
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Solution Overview
Problem
Existing integrated circuit technologies face challenges in efficiently performing voltage level shifting between different power domains, leading to latency and area overhead issues in data transmission, which affects the operation and performance of integrated circuit devices.
Innovation Solution
A circuit and method utilizing an inverter with a series connection of p-channel and n-channel transistors, along with a switch and pull-up transistor, to control voltage transitions between power reference voltages, enabling faster and efficient voltage level shifting with minimal latency and area overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If conventional level shifters are used for voltage level conversion between different power domains, then voltage level shifting can be achieved, but latency and area overhead increase
Solution Approach 1:
The level shifter circuit is segmented into distinct functional blocks: a first circuit block operating at a first reference voltage, a second circuit block operating at a second reference voltage, and a voltage level shifting circuit coupling them. This segmentation allows each block to be optimized for its specific voltage domain while minimizing the complexity of the interface circuitry.
Solution Approach 2:
The voltage level shifting circuit acts as an intermediary between the first and second circuit blocks operating at different reference voltages. It includes level shifting logic that converts signals from the first voltage level to the second voltage level, enabling communication between different power domains without requiring complex redesign of the entire system.
2Area of stationary object
If conventional level shifters are used for voltage level conversion, then voltage level shifting can be achieved, but the circuit area increases
Solution Approach 1:
The voltage level shifting circuit merges the level shifting function with the data transmission path between circuit blocks. By integrating the level shifting logic directly into the communication interface, the patent eliminates the need for separate, bulky level shifting circuits, thereby reducing overall area while maintaining reliable data transmission.
Solution Approach 2:
The voltage level shifting circuit is designed to handle multiple functions: it performs voltage level conversion, maintains signal integrity across different power domains, and enables bidirectional communication. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby reducing total circuit area.
3Speed
If faster voltage level transitions are implemented, then data transmission speed improves, but circuit complexity increases
Solution Approach 1:
The voltage level shifting circuit employs dynamic control mechanisms that adjust the switching behavior based on the input signal transitions. By using controlled switching between different transistor states, the circuit achieves fast voltage transitions without requiring overly complex circuitry, as the dynamics are managed through coordinated transistor operation rather than additional control logic.
Data Source
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AI summary
A circuit for providing voltage level shifting in an integrated circuit includes an inverter (610) having an input coupled to receive an input signal having a first voltage level (VDDL); an output stage (618) having a first transistor (620) coupled in series with a second transistor (622), and an output node (660) between the first transistor and the second transistor generating an output signal (OUT) having a second voltage level (VDDH). A gate (622) of the second transistor is coupled to an output (616) of the inverter. A pull-up transistor (630) is coupled between a reference voltage (VDDH) having the second voltage level and a gate (649) of the first transistor. A switch (624) is coupled between the gate of the first transistor and the gate of the second transistor to control a voltage at the gate of the first transistor. A method of providing voltage level shifting in an integrated circuit is also disclosed.