Low-Power Voltage-Mode Driver Calibration for Impedance Matching
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Solution Overview
Problem
Voltage-mode transmitter drivers in chip-to-chip connections face impedance mismatch issues due to varying transistor resistances, leading to excessive noise and unstable outputs, primarily caused by environmental factors and different operation modes.
Innovation Solution
A device with a tunable gate voltage system is used to calibrate the impedances of UP-cell and DOWN-cell components in a low power voltage-mode transmitter driver, employing additional transistors and resistors connected to a voltage source and output end, along with a replica circuit and calibration logic to match impedances with reference values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If transistors in the UP-cell or DOWN-cell are composed of large size n-type transistors to handle high-speed chip-to-chip interconnection, then the transistor can provide sufficient driving capability, but the resistance varies significantly due to different driving voltage levels and environmental factors such as temperature, humidity, and vibration, leading to impedance mismatch
Solution Approach 1:
The patent applies preliminary calibration action by measuring the actual impedance of the UP-cell and DOWN-cell before operation, and pre-adjusting the resistor values (R1 and R2) to compensate for anticipated impedance variations. This is achieved through calibration circuits that calculate required resistor adjustments based on measured impedance values, ensuring impedance matching is established in advance before the transmitter driver begins normal operation.
Solution Approach 2:
The patent changes the resistance parameter of resistors R1 and R2 to compensate for impedance mismatch. By adjusting these resistor values based on measured impedance deviations, the system dynamically modifies circuit parameters to maintain proper impedance matching between UP-cell and DOWN-cell, thereby resolving the reliability issue caused by environmental variations.
2Adaptability or versatility
If the resistance of n-type transistors is allowed to vary with driving voltage levels and environmental factors, then the transistor adapts to different operating conditions, but this causes mismatch between UP-cell impedance and DOWN-cell impedance, resulting in excessive noise and unstable output
Solution Approach 1:
The patent implements feedback by measuring the actual impedance of the UP-cell and DOWN-cell and using this information to adjust the resistor values R1 and R2. The calibration circuits continuously monitor impedance conditions and provide feedback signals that drive the adjustment process, ensuring that any deviations from optimal impedance matching are detected and corrected, thereby reducing noise and output instability.
Solution Approach 2:
The patent changes the resistance parameter of resistors R1 and R2 based on measured impedance conditions to compensate for variations caused by different operation modes and environmental factors. This dynamic parameter adjustment ensures that impedance matching is maintained across varying operating conditions, eliminating the harmful effects of mismatch while preserving operational adaptability.
3Reliability
If impedance calibration is performed to match UP-cell and DOWN-cell impedances to reference impedance values, then signal integrity is improved and noise is reduced, but additional calibration circuits and control logic are required, increasing device complexity
Solution Approach 1:
The patent uses copying by creating simplified replica versions of the UP-cell and DOWN-cell calibration circuits that can be independently tested and calibrated. These replica circuits replicate the essential impedance characteristics without requiring full-scale implementation, allowing calibration to be performed on copies before being applied to the main system, thereby reducing the complexity burden on the primary signal path.
Data Source
AI summary
Systems for calibrating impedances caused by a first component and a second component of a voltage-mode transmitter driver are described herein. The first component includes a first transistor and a first resistor connected to the first transistor, wherein the first component is connected to a voltage source and an output end of the voltage-mode transmitter driver, respectively. The second component includes a second transistor and a second resistor connected to the second transistor, wherein the second component is connected to the output end of the voltage-mode transmitter driver, and a third transistor, respectively. A first gate of the third transistor is applied with a first tunable gate voltage, and the first tunable gate voltage is configured to be tuned to calibrate a first impedance between the output end and a ground to match with a second impedance between the voltage source and the output end.


