Voltage-Mode Phase Interpolator for Low-Power Clock Mixing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional phase interpolators, such as current steering phase interpolators, face challenges in high-speed applications requiring large currents, are costly, and limited to sinusoidal input signals, leading to high power consumption and increased costs.

Innovation Solution

A phase interpolator utilizing a phase adjusting circuit with a first and second MOS transistor module, connected in parallel, generates an interpolation signal by mixing clock signals with the same frequency but different phases using a voltage mode, incorporating low-pass filter and shaping circuits to achieve phase adjustment under lower voltage, reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If current steering phase interpolator is used to achieve fast signal switching in high-speed circuits, then switching speed is improved, but power consumption increases due to larger current requirement

Engineering Contradiction:
Improveswitching speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent changes the operating parameter from current mode to voltage mode. The phase interpolator uses voltage signals instead of current signals to control the phase adjustment, thereby reducing power consumption while maintaining switching speed performance in high-speed circuits

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If conventional current steering phase interpolator is used, then phase adjustment function is achieved, but cost increases and circuit complexity increases

Engineering Contradiction:
Improvephase adjustment capabilityVSAvoidcircuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the essential phase adjustment function from the complex current steering architecture and implements it using a simplified voltage mode circuit with MOS transistors and resistors, removing unnecessary complexity while preserving the core functionality

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces expensive current steering components with simpler, lower-cost voltage mode components including standard MOS transistors and resistors, achieving the same phase adjustment function at reduced cost and complexity

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Productivity

If current steering phase interpolator is used for high-speed applications, then signal switching capability is improved, but the circuit requires larger current which increases power consumption

Engineering Contradiction:
Improvesignal switching capabilityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSPower

Solution Approach 1:

The patent changes the fundamental operating parameter from current to voltage, allowing the circuit to achieve high-speed signal switching capability without requiring large currents, thus maintaining productivity while reducing power consumption

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3675359B1Phase interpolator
Publication Date: 2024.10.09 AMLOGIC (SHANGHAI) CO LTD
  • EP3675359B1 patent drawingFigure 1~3
  • EP3675359B1 patent drawingFigure 4~5
  • EP3675359B1 patent drawingFigure 6

AI summary

The invention relates to the technical field of high-speed data transmission, and more particularly, to a phase interpolator. The phase interpolator comprises a phase adjusting circuit, and the phase adjusting circuit comprises a first phase adjusting module and a second phase adjusting module, the first phase adjusting module outputs a first clock signal, and the second phase adjusting module outputs a second clock signal; the first phase adjustment module and the second phase adjustment module are connected in parallel to output an interpolation signal. The technical scheme provided by the invention has the beneficial effects that through the first phase adjustment module and the second phase adjustment module the first clock signal and the second clock signal with the same frequency and different phases are mixed in proportion by adopting a voltage mode to generate an interpolation signal with the same frequency and the phase between the first clock signal and the second clock signal so as to achieve the purpose of phase adjustment, and meanwhile, the circuit can be carried out under lower voltage, so that the power consumption of the phase adjusting circuit is further reduced.