Voltage Prediction for Memory Cell Read Offset Correction

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Solution Overview

Problem

As memory cells in storage devices wear out, the preset read voltage levels become severely offset relative to the threshold voltage distribution, leading to inefficiencies in correcting these levels, especially as the number of bits stored in each cell increases.

Innovation Solution

A voltage prediction method is introduced, where multiple memory cells are read using a first read voltage level to obtain count information, allowing for the prediction of a second read voltage level that distinguishes adjacent states in the threshold voltage distribution, thereby improving correction efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional correction methods are used to correct read voltage levels for each state, then data accuracy can be maintained, but correction time and processing complexity increase significantly as the number of bits per cell increases

Engineering Contradiction:
Improvedata accuracyVSAvoidcorrection time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the correction process into two distinct phases: a first correction phase that corrects read voltage levels for first states (e.g., programmed states) using first offset information, and a second correction phase that corrects read voltage levels for second states (e.g., erased states) using second offset information. This segmentation allows different correction strategies to be applied to different state groups, reducing overall correction time while maintaining accuracy for multi-bit memory cells.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary correction actions by obtaining and applying offset information for first states before reading data requiring correction for second states. The first offset information is obtained through preliminary readings and corrections, and this correction is applied to subsequent readings. This preliminary action reduces the need for repeated full correction cycles, thereby reducing correction time while maintaining data accuracy.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If the number of read voltage levels to be corrected increases with more bits per cell, then data accuracy can be maintained, but the complexity of the correction process increases

Engineering Contradiction:
Improvedata accuracyVSAvoidcorrection process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The correction process is segmented into separate correction paths for first states and second states. First offset information is obtained and applied to correct read voltage levels for first states, while second offset information is obtained and applied to correct read voltage levels for second states. This segmentation simplifies the overall correction process by breaking down the complex multi-level correction into manageable state-specific corrections, reducing process complexity while maintaining accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameters of the correction process by using different offset information for different states. First offset information (e.g., first voltage offset) is used for correcting first states, while second offset information (e.g., second voltage offset) is used for correcting second states. This parameter differentiation allows the correction process to adapt to the specific characteristics of each state group, simplifying the correction logic while maintaining high data accuracy for multi-bit memory cells.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If multiple read voltage levels are used to distinguish adjacent states, then data accuracy improves, but the time required to obtain offset information for each level increases

Engineering Contradiction:
Improvestate distinction accuracyVSAvoidcorrection efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent segments the offset information collection and correction process into state-specific groups. First offset information is collected and used to correct first states, while second offset information is collected and used to correct second states. This segmentation allows parallel or sequential processing of different state corrections, improving correction efficiency by avoiding the need to sequentially correct all voltage levels for all states in a single pass, while maintaining high state distinction accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary correction actions by obtaining offset information for first states and applying it before proceeding to correct second states. This preliminary action establishes a corrected baseline that improves subsequent correction efficiency. By performing corrections in a staged manner rather than requiring all offset information simultaneously, the system improves productivity while maintaining the accuracy benefits of multiple read voltage levels.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12293792B2Voltage prediction method, memory storage device and memory control circuit unit
Publication Date: 2025.05.06 PHISON ELECTRONICS
  • US12293792B2 patent drawing
  • US12293792B2 patent drawing
  • US12293792B2 patent drawing

AI summary

A voltage prediction method, a memory storage device and a memory control circuit unit are disclosed. The method includes: reading a plurality of memory cells in a rewritable non-volatile memory module by using a first read voltage level to obtain count information, and the first read voltage level is configured to distinguish a first state and a second state adjacent to each other in a threshold voltage distribution of the memory cells, and the count information reflects a total number of first memory cells meeting a target condition among the memory cells; and predicting a second read voltage level according to the count information, and the second read voltage level is configured to distinguish a third state and a fourth state adjacent to each other in the threshold voltage distribution.