Internal Voltage Pulse Synthesis for Adaptive Memory Voltage Drive
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in generating internal voltages efficiently, particularly high voltage VPP and back-bias voltage VBB, which require charge pump circuits and have limitations in adjusting drive levels according to external voltage variations.
Innovation Solution
An internal voltage generation circuit that includes a level shifter, pulse generation circuits with adjustable pulse widths, and a pulse synthesis circuit to generate a synthesis pulse for driving internal voltages, allowing for dynamic adjustment of internal voltage drive based on external voltage levels, using a combination of passive elements and inverter chains to manage pulse widths and delay times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If charge pump circuits are used to generate high voltage VPP and back-bias voltage VBB, then the required voltage levels can be achieved, but the device complexity increases and adjustment flexibility is limited
Solution Approach 1:
The patent combines multiple voltage generation functions (core voltage, high voltage VPP, back-bias voltage VBB) into a single integrated voltage generation circuit. This merging approach eliminates the need for separate charge pump circuits, reducing overall device complexity while maintaining the capability to generate all required voltage levels through a unified control mechanism.
Solution Approach 2:
The patent implements dynamic adjustment of pulse widths in response to external voltage variations. The circuit automatically modifies its operation parameters (pulse widths) based on real-time voltage conditions, enabling flexible voltage level adjustment without requiring complex external control circuits or multiple fixed-configuration charge pumps.
2Ease of manufacture
If fixed configuration voltage generation circuits are used, then circuit design is simplified, but the ability to adjust internal voltage drive according to external voltage variations is limited
Solution Approach 1:
The patent employs pulse generation circuits with adjustable pulse widths that respond dynamically to external voltage variations. When external voltage decreases, the circuit automatically increases pulse widths to maintain adequate drive strength for internal voltages. This dynamic adaptation is achieved through relatively simple circuit modifications rather than complex reconfigurable architectures.
Solution Approach 2:
The voltage generation circuit incorporates feedback mechanisms that monitor external voltage levels and automatically adjust internal operation parameters accordingly. The circuit detects voltage variations and modifies pulse widths in response, creating a self-regulating system that maintains optimal performance across varying external conditions without requiring complex external control.
3Loss of energy
If external voltage decreases, then power consumption is reduced, but the drive level of internal voltages degrades and operation speed decreases
Solution Approach 1:
The patent implements dynamic pulse width adjustment that responds to external voltage levels. When external voltage decreases, the circuit automatically increases pulse widths to compensate for reduced drive capability, maintaining adequate internal voltage levels and operation speed. This dynamic compensation allows the system to maintain performance across a range of power consumption conditions.
Solution Approach 2:
The patent changes operational parameters (pulse widths) based on external voltage conditions. By adjusting pulse widths in response to voltage variations, the circuit maintains adequate drive levels for internal voltages even when external voltage and power consumption decrease. This parameter adaptation ensures operation speed is preserved across different power conditions.
Data Source
AI summary
An internal voltage generation circuit may be provided. The internal voltage generation circuit may include a pulse generation circuit configured to generate a first pulse and a second pulse in response to an external voltage. The internal voltage generation circuit may include a pulse synthesis circuit configured for synthesizing the first pulse and the second pulse to generate a synthesis pulse.