Voltage Ramping Detection in NAND Memory
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Solution Overview
Problem
Conventional NAND memory devices experience operational delays due to voltage ramping delays, which are influenced by capacitive loadings, process variations, supply voltages, and temperature conditions, leading to increased read and write times even under nominal conditions.
Innovation Solution
An analog detection circuit is implemented in NAND memory devices to accurately detect the completion of voltage ramping, referred to as 'flat-top' detection, allowing the controller to proceed with operations without waiting for worst-case condition delay times by generating a ready signal upon reaching the target voltage level within an accepted tolerance range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If trimmable delay settings are used to manage wait times, then reliability is improved by accounting for worst case conditions, but productivity deteriorates by increasing average read and write times under nominal conditions
Solution Approach 1:
The patent transitions from static delay settings to dynamic delay adjustment by implementing a voltage ramping detection circuit that continuously monitors voltage levels and automatically adjusts the delay period based on real-time conditions. The delay period is dynamically shortened when voltage ramping completes faster than worst-case predictions, thereby improving productivity while maintaining reliability through adaptive response to actual system state
Solution Approach 2:
The patent implements a feedback mechanism where the voltage ramping detection circuit monitors the actual voltage level on internal nodes and provides feedback to the controller. This feedback enables the controller to adjust the delay period based on actual ramping completion rather than relying on pre-calculated worst-case delays, thereby resolving the contradiction between reliability and productivity
2Reliability
If static delay periods are used to ensure voltage ramping completion, then reliability is improved by preventing premature operations, but productivity deteriorates by causing unnecessary waiting time under fast conditions
Solution Approach 1:
The patent replaces static delay periods with dynamic delay adjustment based on real-time voltage monitoring. The delay period is continuously adapted according to the actual voltage ramping speed detected by the monitoring circuit, allowing the system to minimize waiting time when ramping is fast while ensuring sufficient delay when ramping is slow, thereby resolving the contradiction between reliability and time loss
Solution Approach 2:
The voltage ramping detection circuit automatically detects when voltage ramping is complete and self-adjusts the delay period without requiring external intervention or complex control logic. The system serves itself by using the monitoring circuit's detection results to automatically optimize the delay period, eliminating unnecessary waiting time while maintaining reliability
3Measurement precision
If worst case condition-based delay settings are used, then measurement precision is improved by ensuring adequate voltage stabilization, but productivity deteriorates by increasing average operation times under nominal conditions
Solution Approach 1:
The patent implements real-time feedback from the voltage ramping detection circuit to the controller, enabling precise measurement of actual voltage stabilization timing. This feedback mechanism allows the system to accurately determine when voltage reaches stable levels under actual operating conditions, replacing conservative worst-case estimates with precise real-time measurements, thereby improving productivity while maintaining measurement precision
Solution Approach 2:
The patent changes the delay period parameter dynamically based on detected voltage ramping characteristics. Instead of using a fixed worst-case delay parameter, the system adjusts the delay period parameter in real-time according to actual voltage stabilization speed, thereby optimizing productivity while maintaining adequate voltage stabilization through adaptive parameter modification
Data Source
AI summary
Method, system and apparatus for detecting voltage ramping to a target voltage level in steady state, comprising, ramping a regulated voltage to a steady state target voltage for an operation of a load circuit, the steady state target voltage being a voltage level that enables the load circuit to perform the operation, generating an output signal indicating that the regulated voltage has reached the target voltage and generating a ready signal responsive to detecting the output signal.


