Voltage Reference Circuit Fast Enable Disable LDO

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Solution Overview

Problem

Conventional voltage reference circuits, such as low drop-out (LDO) voltage regulators, face challenges in rapidly switching between enabled and disabled states due to large capacitive loads, leading to slow response times and inefficient power management, particularly in portable devices where immediate power down is required.

Innovation Solution

The integration of a low drop-out (LDO) regulator with a fast turn-on and fast turn-off circuit, utilizing a reference current source, current mirror, and control signals to quickly provide and discharge output current, along with a third control signal for modulating output current to prevent overshoot, enables rapid voltage stabilization and efficient power management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a large load capacitor is used to ensure loop stabilization, then voltage stability is improved, but the disabling response time deteriorates

Engineering Contradiction:
Improvevoltage stabilityVSAvoiddisabling response time
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The patent divides the current path into two separate paths: a first current path through the load capacitor for normal operation, and a second current path through a dedicated discharge transistor for rapid disabling. This segmentation allows the large capacitor to maintain voltage stability during normal operation while the separate discharge path enables fast disabling by providing a dedicated low-impedance path to ground that bypasses the capacitor's natural discharge time constant.

Inventive Principle:
Principle #1Segmentation

2Stability of the object's composition

If a large load capacitor is used to ensure loop stabilization, then voltage stability is improved, but power consumption during disable increases

Engineering Contradiction:
Improvevoltage stabilityVSAvoidpower consumption during disable
Core Design Contradiction:
Stability of the object's compositionVSLoss of energy

Solution Approach 1:

The patent segments the current discharge function by introducing a dedicated discharge transistor in parallel with the load capacitor. This allows the capacitor to remain charged for stability during normal operation, while the discharge transistor provides a controlled path to rapidly dump the capacitor's energy to ground when disabling is required, minimizing unnecessary power consumption during the disable transition.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If conventional LDO regulator is used, then circuit simplicity is maintained, but switching speed between enabled and disabled states deteriorates

Engineering Contradiction:
Improvecircuit simplicityVSAvoidswitching speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent prepares the discharge path in advance by keeping the discharge transistor's gate connected to the operational amplifier's output, which can immediately drive the transistor into conduction when disabling is required. This preliminary arrangement of the discharge path, without requiring additional complex control logic, enables the circuit to switch rapidly from enabled to disabled state while maintaining relative circuit simplicity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8143869B2Voltage reference circuit with fast enable and disable capabilities
Publication Date: 2012.03.27 MEDIATEK INC
  • US8143869B2 patent drawing
  • US8143869B2 patent drawing
  • US8143869B2 patent drawing

AI summary

A circuit for providing an output voltage substantially equal to a reference voltage includes: a low drop-out (LDO) regulator coupled to the reference voltage for producing the output voltage at an output terminal; a reference current source having a first end and a second end for providing a predetermined reference current; a first transistor having a first terminal coupled to a first supply voltage, a second terminal, and a control terminal coupled to the second terminal of the first transistor; a first switch for selectively coupling the second terminal of the first transistor to the first end of the reference current source according to a first control signal; and a second transistor having a first terminal coupled to the first supply voltage, a control terminal coupled to the control terminal of the first transistor, and a second terminal coupled to the output terminal.