Voltage Reference Startup Test Circuit With Reduced Area

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Solution Overview

Problem

Voltage reference circuits in electronic circuits, particularly in the banking sector, require a start-up test circuit to verify correct operation, but these circuits have complex structures that occupy significant area when integrated, replicating the voltage reference circuit and consuming excessive space.

Innovation Solution

A simplified start-up test circuit is designed using MOS transistors, reducing the area occupied by replicating critical transistor stacks and incorporating elementary test circuits to verify the correct startup of the voltage reference circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the start-up test circuit replicates the overall structure of the voltage reference circuit, then the verification capability is improved, but the circuit area occupied increases significantly

Engineering Contradiction:
Improvestartup verification capabilityVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The start-up test circuit is segmented into multiple independent elementary test circuits, each responsible for testing a specific transistor stack within the voltage reference circuit. This segmentation allows each test circuit to be minimal in size while collectively providing comprehensive coverage of all critical paths, thereby reducing the total area compared to a full replication approach.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention extracts only the essential testing functionality from the complete voltage reference circuit structure. Instead of replicating the entire circuit, only the critical transistor stacks that determine start-up behavior are replicated in simplified elementary test circuits, removing unnecessary components while preserving verification capability.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If the start-up test circuit replicates the voltage reference circuit structure, then the test coverage is improved, but the device complexity increases

Engineering Contradiction:
Improvetest coverageVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The complex voltage reference circuit is divided into discrete transistor stacks, and corresponding elementary test circuits are created for each stack. This segmentation transforms a single complex replication task into multiple simple, modular test units, reducing overall device complexity while maintaining comprehensive test coverage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention extracts only the essential transistor stacks that are critical for start-up verification, omitting non-essential circuit elements. This extraction reduces the complexity of the test circuit structure while preserving the ability to verify correct start-up operation of the voltage reference circuit.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP4361656B1Electronic circuit comprising a voltage reference circuit and a start-up test circuit
Publication Date: 2026.03.25 STMICROELECTRONICS (GRENOBLE 2) SAS
  • EP4361656B1 patent drawingFigure 1~2
  • EP4361656B1 patent drawingFigure 3~4
  • EP4361656B1 patent drawingFigure 5~6

AI summary

This description relates to an electronic circuit (70) comprising a voltage reference circuit (20) and a voltage reference circuit start-up test circuit (75), the voltage reference circuit comprising at least a first stack of a first transistor (TM5) receiving a first control signal (pbias), and a second transistor (TM6) receiving a second control signal (Vc_TB3), and the start-up test circuit comprising at least a first elementary test circuit (80) comprising a second stack of a third transistor (TM11) and a fourth transistor (TM12), the third transistor being of the same type as the first transistor and receiving the first control signal, the fourth transistor being of the same type as the second transistor and receiving the second control signal, the first elementary test circuit being configured to provide a first binary signal (TEST1).