Voltage Regulator Circuit Bulk Connection Control
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Solution Overview
Problem
The existing voltage regulator circuits face issues with parasitic PNP transistor triggering in MOSFETs, leading to uncontrollable MOSFETs and current leakage from output to input when the input voltage drops below the required output level, causing the output voltage to be tied to the input voltage.
Innovation Solution
A voltage regulator circuit with a controller component that selectively configures between SMPS and LDO regulators, using a bulk connection to prevent spurious latching and current flow by switching between source-to-bulk and drain-to-bulk connections based on voltage levels, allowing the SMPS to step-up the input voltage when necessary.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a linear regulator (LDO) is used during quiescent mode, then quiescent current is reduced, but the regulator cannot step-up voltage when input voltage drops below output level
Solution Approach 1:
The patent implements dynamic switching between LDO and SMPS regulators based on operating conditions. The controller monitors input voltage levels and load requirements, transitioning from LDO during quiescent mode to SMPS when voltage stepping is required, optimizing both power consumption and regulatory capability across different operating states
Solution Approach 2:
The patent creates a universal voltage regulation system that incorporates both LDO and SMPS regulators in parallel, each capable of handling different operating scenarios. The system can function as a simple LDO regulator during low-power modes or activate the SMPS component for voltage conversion when needed, providing multi-functional adaptability
2Loss of energy
If SMPS is used for voltage regulation, then efficiency is improved for large differential voltages, but quiescent current increases
Solution Approach 1:
The patent employs periodic switching action within the SMPS regulator, where power switches oscillate between on and off states to transfer energy in discrete pulses. This periodic operation enables efficient energy conversion while allowing the system to enter lower-power states during quiescent periods, reducing overall quiescent current consumption
Solution Approach 2:
The system dynamically adjusts the operating mode of the SMPS regulator based on load conditions and input-output voltage differential. During heavy load or large differential conditions, the SMPS operates at full switching efficiency. During light load or quiescent conditions, the system transitions to LDO mode or reduces SMPS activity, optimizing the balance between efficiency and quiescent current
3Reliability
If MOSFET bulk is connected to source, then spurious latching is prevented, but current leakage occurs from output to input when input voltage drops
Solution Approach 1:
The patent implements dynamic reconfiguration of the MOSFET bulk connection based on operating mode. During normal LDO operation, the bulk is connected to the source to prevent spurious latching. When SMPS mode is activated and input voltage drops below output level, the controller switches the bulk connection to the drain, preventing current leakage through the body diode while maintaining MOSFET control stability
Data Source
AI summary
A voltage regulator circuit arranged to receive a voltage supply signal, and to output a regulated voltage signal is described. The voltage regulator circuit comprises at least one switched mode power supply component selectively configurable to perform regulation of the voltage supply signal, at least one linear voltage regulator component selectively configurable to perform regulation of the voltage supply signal, and at least one controller component. The at least one controller component is arranged to receive an indication of a voltage level of the voltage supply signal, and configure a bulk connection for at least one switching device of the at least one linear voltage regulator component such that current flow from an output of the voltage regulator circuit to an input of the voltage regulator circuit through the bulk of the at least one switching device of the at least one linear voltage regulator component is resisted, if the indicated voltage level of the voltage supply signal is less than the threshold voltage level.