Voltage Regulator Hybrid Dead Time Control
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Solution Overview
Problem
Voltage regulators in information handling systems face inefficiencies due to fixed dead time approaches causing shoot-through current during phase re-enablement and adaptive dead time approaches introducing unnecessary delays in steady-state operation.
Innovation Solution
A voltage regulator with a control circuit that operates in both fixed dead time and adaptive dead time modes, delaying pulse-width modulated signal propagation by a fixed amount in fixed dead time mode and transitioning driving voltages in response to threshold voltage decreases in adaptive dead time mode, to optimize power conversion efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If fixed dead time approaches are used, then efficiency in normal steady-state operation is improved, but shoot-through current occurs during phase re-enablement
Solution Approach 1:
The patent implements a dynamic dead time adjustment mechanism that transitions between fixed dead time mode during steady-state operation and adaptive dead time mode during phase re-enablement. The control circuit monitors phase enablement status and automatically switches control strategies, allowing short fixed dead time for efficiency while preventing shoot-through current during transitions through adaptive control.
Solution Approach 2:
The patent changes the dead time parameter dynamically based on operational state. During steady-state, a fixed short dead time is applied to maximize efficiency. During phase re-enablement, the system transitions to adaptive dead time control that adjusts the parameter based on real-time conditions, preventing shoot-through current while maintaining overall system efficiency.
2Reliability
If adaptive dead time approaches are used, then shoot-through current is prevented during phase re-enablement, but unnecessarily long delays are introduced during steady-state operation
Solution Approach 1:
The control circuit dynamically selects between fixed and adaptive dead time modes based on operational state detection. During steady-state operation, the system uses fixed dead time to minimize delays and maximize efficiency. During phase re-enablement, it switches to adaptive mode to provide necessary protection, thus avoiding unnecessary delays during normal operation while maintaining reliability during transitions.
Solution Approach 2:
The patent implements parameter change by switching dead time control strategies based on phase enablement status. The fixed dead time parameter is used during steady-state to minimize time loss, while adaptive dead time parameters are applied during phase re-enablement to prevent shoot-through current, optimizing the balance between speed and safety.
3Loss of energy
If phase-shedding is employed, then power efficiency is improved during low loads, but complex adaptive control logic is required
Solution Approach 1:
The patent segments the control logic into distinct modes: fixed dead time control for steady-state operation and adaptive dead time control for phase re-enablement. This segmentation simplifies the overall control architecture by providing clear, separate control strategies for different operational states, reducing the complexity burden of implementing both phase-shedding and dead time control.
Solution Approach 2:
The patent uses parameter changes to manage complexity by switching between fixed and adaptive dead time parameters based on operational mode. This approach simplifies control logic compared to continuously adaptive control, as the system only needs to monitor phase enablement status and switch between two well-defined control parameter sets, making the complex task of managing phase-shedding and dead time control more tractable.
Data Source
AI summary
A voltage regulator may comprise a high-side switch and a low-side switch for delivering electrical current to the at least one information handling resource, a high-side driver configured to drive a high-side driving voltage for regulating a first electrical current of the high-side switch, a low-side driver configured to drive a low-side driving voltage for regulating a second electrical current of the low-side switch, and a control circuit configured to operate the at least one voltage regulator in both of a fixed dead time mode and an adaptive dead time mode.