Voltage Regulator Gain Stage for High-Speed Stability

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Solution Overview

Problem

Conventional low-dropout (LDO) voltage regulators face stability issues during high-speed operations due to limited headroom and are not suitable for modern semiconductor processes with low operation voltages, while large capacitors occupy significant chip area or introduce inductive effects at high frequencies.

Innovation Solution

A high-speed and low-cost voltage regulator design featuring a sensing circuit and a gain stage in a one-stage negative feedback loop, coupled in parallel to a loading circuit, which senses variations in the output voltage and adjusts current to stabilize the supply voltage without the need for significant headroom, using N-type FETs as core devices to manage high-frequency variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional LDO regulator is used to provide supply voltage to multi-circuit blocks, then the regulator can maintain supply voltage during operation, but the regulator suffers from stability problems during high-speed operation due to limited headroom

Engineering Contradiction:
Improvestability of supply voltageVSAvoidhigh-speed operation capability
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The regulator is divided into two functional stages: a first stage comprising the LDO regulator for maintaining supply voltage, and a second stage comprising the gain stage for providing adjusting current. This segmentation allows each stage to perform its specific function optimally, with the gain stage compensating for the LDO regulator's instability at high speeds.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gain stage acts as an intermediary between the sensing circuit and the output terminal. It receives the sensing signal from the sensing circuit and provides the adjusting current to the output terminal, thereby mediating the control process to improve stability during high-speed operation without requiring significant headroom.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a large capacitor is used to connect to the output node of the power source to create a charge pool, then the supply voltage stability is improved, but the capacitor occupies large chip area if on-chip or introduces inductive effects if off-chip

Engineering Contradiction:
Improvesupply voltage stabilityVSAvoidchip area occupied by capacitor
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The large capacitor is extracted from the system and replaced by the gain stage coupled in parallel to the loading circuit. The gain stage provides the necessary charge regulation function without requiring a large physical capacitor, thereby eliminating the chip area occupation and inductive effects associated with large capacitors.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The solution changes the approach from using a large capacitance value to using an active circuit (gain stage) that dynamically adjusts current based on voltage variations. This parameter change from passive capacitance to active current control achieves voltage stability without the physical constraints of large capacitors.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9665114B2Regulator applied on output terminal of power source to adjust adjusting current for increasing reference voltage when sensing decrease of reference voltage and decreasing reference voltage when sensing increase of reference voltage and regulating method
Publication Date: 2017.05.30 MEDIATEK INC
  • US9665114B2 patent drawing
  • US9665114B2 patent drawing
  • US9665114B2 patent drawing

AI summary

A regulator applied to regulate a first reference voltage on an output terminal, the regulator includes: a sensing circuit, arranged to sense a variation of the first reference voltage on the output terminal to generate a sensing signal; and a gain stage, arranged to provide an adjusting current to the output terminal in response to the sensing signal for reducing the variation of the first reference voltage, and the gain stage is coupled in parallel to a loading circuit powered by the first reference voltage.