Voltage Regulator Output Overshoot Suppression
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Solution Overview
Problem
Voltage regulators face challenges in suppressing output voltage overshoot during fast load transients, which can exceed the absolute maximum rating of components, leading to potential damage or data corruption.
Innovation Solution
The implementation of a voltage regulator system that increases the inductor current discharge slope by controlling the voltage across low-side transistors using an adaptive gate control scheme or selectively connecting a resistor in series with the transistors to manage output voltage overshoot.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the voltage regulator uses conventional control methods, then the circuit structure remains simple, but the output voltage overshoot cannot be suppressed during fast load transients
Solution Approach 1:
The patent applies preliminary anti-action by detecting the rate of change of output voltage and proactively adjusting the discharge slope of the inductor current before significant overshoot occurs. The controller increases the discharge slope when dVout/dt exceeds a threshold, creating a counteracting effect that suppresses voltage overshoot before it can damage components.
Solution Approach 2:
The patent implements dynamics by making the discharge slope of the inductor current adjustable rather than fixed. The controller dynamically changes the discharge slope based on real-time detection of output voltage rate of change, allowing the system to adapt to fast load transients and suppress overshoot while maintaining simplicity.
2Reliability
If the discharge slope of inductor current is increased to suppress voltage overshoot, then the output voltage stability improves, but the stress on transistors increases
Solution Approach 1:
The patent uses dynamics to adjust the discharge slope of the inductor current based on the detected rate of change of output voltage. By dynamically increasing the discharge slope only when dVout/dt exceeds a threshold, the system suppresses voltage overshoot while avoiding continuous high-stress conditions on the transistors.
Solution Approach 2:
The patent applies parameter changes by modifying the discharge slope parameter of the inductor current based on operating conditions. The controller changes this parameter dynamically according to the output voltage rate of change, allowing optimal suppression of overshoot while managing transistor stress through parameter adaptation.
3Productivity
If a fixed discharge slope is used for inductor current, then the circuit control is simple, but the system cannot respond to fast load transients
Solution Approach 1:
The patent implements dynamics by making the discharge slope of the inductor current dynamically adjustable based on the rate of change of output voltage. This allows the system to respond quickly to fast load transients by increasing the discharge slope when needed, while maintaining relatively simple control circuitry.
Solution Approach 2:
The patent applies feedback by detecting the rate of change of output voltage (dVout/dt) and using this information to adjust the discharge slope of the inductor current. This feedback mechanism enables the system to respond to fast load transients and suppress voltage overshoot through real-time monitoring and adjustment.
Data Source
AI summary
A method for suppressing voltage overshoot at an output of a voltage regulator is disclosed. The voltage regulator includes at least one channel having a first set of (high-side) transistors and a second set of (low-side) transistors. In implementations of the method, an output voltage at an output of at least one channel of a voltage regulator is detected and compared with a reference voltage. A rate of change associated with the output voltage is also determined and compared with a threshold rate of change. When the output voltage is greater than the reference voltage and the rate of change is greater than the threshold rate of change, a resistance value associated with the second set of transistors is increased from a first resistance value to a second resistance value to prevent the output voltage from overshooting and/or to suppress an output voltage overshoot.