Voltage Regulator Predictive Activity Adjustment
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Solution Overview
Problem
Conventional voltage regulators face challenges in maintaining a stable output voltage during increased current consumption in digital circuits, leading to potential clock speed reductions and system failures due to voltage drops.
Innovation Solution
A voltage regulator system that predicts processing activity levels and adjusts its impedance and output voltage accordingly, using activity adjustment signals from digital circuits to proactively manage voltage drops by modifying the output voltage based on projected processing demands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If an analog on-chip LDO voltage regulator is embedded in the same semiconductor die as the circuit, then the use of metal traces and decoupling capacitors is reduced, but the circuit may experience voltage drops during increased current consumption leading to clock speed reduction or failure
Solution Approach 1:
The voltage regulator projects the processing activity level of the circuit during subsequent clock cycles and proactively adjusts the output voltage before voltage drops occur. This preliminary action prevents voltage drops that would otherwise cause clock speed reduction or circuit failure, while maintaining the space-saving on-chip integration.
Solution Approach 2:
The voltage regulator dynamically adjusts the output voltage based on the projected processing activity level of the circuit. By making the voltage regulation adaptive and responsive to predicted circuit demands, the system maintains stable operation during current consumption increases without requiring external decoupling capacitors or metal traces.
2Reliability
If the output voltage is increased after a voltage drop to restore circuit operation, then the circuit can resume normal operation, but the clock speed may be reduced during the voltage drop period
Solution Approach 1:
The voltage regulator projects future processing activity levels and adjusts the output voltage in advance before voltage drops occur. This prevents the voltage drop that would force clock speed reduction, allowing the circuit to maintain full productivity while ensuring continuous operation during high current consumption periods.
Data Source
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AI summary
A method includes receiving, at a voltage regulator, an activity adjustment signal from a digital circuit. The method also includes controlling one or more variable impedance elements of the voltage regulator to modify an output voltage provided to the digital circuit. The output voltage is based at least in part on the activity adjustment signal.