Gain-Boosted Voltage Regulator Compensation for PVT Stability
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Solution Overview
Problem
Existing voltage regulators face challenges in maintaining stable compensation over process, voltage, and temperature (PVT) variations due to mismatched temperature coefficients between poly-resistor and MOS processes, affecting the tracking of resistance values and resulting in inconsistent performance.
Innovation Solution
The design incorporates a differential pair of input transistors with a second pair of transistors operating in a linear region and a compensation capacitor coupled to intermediate nodes, decoupling gain and bandwidth, and adding additional poles and zeros to the transfer function to enhance low-frequency gain and stability, using transistors with specific configurations to operate in saturation and linear regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a compensation capacitor is coupled between the output node and supply node using poly-resistor process, then compensation can be provided, but the temperature coefficients do not match between poly-resistor and MOS processes causing PVT variation instability
Solution Approach 1:
The patent uses transistors from the same MOS process for both the error amplifier and compensation circuit, ensuring matching temperature coefficients. The compensation transistor is configured to operate in the linear region with its source coupled to the supply node and drain coupled to an intermediate node, creating homogeneous process characteristics that track PVT variations consistently.
Solution Approach 2:
The patent changes the operating region of the compensation transistor from saturation to linear region, and couples the compensation capacitor to an intermediate node rather than the output node. This parameter change allows the compensation circuit to track PVT variations properly while maintaining stable operation across process, voltage, and temperature conditions.
2Device complexity
If gain and bandwidth are coupled in traditional error amplifier design, then simpler design is achieved, but independent control of DC gain and bandwidth is lost
Solution Approach 1:
The patent segments the error amplifier into distinct functional blocks: a differential input pair for signal reception, a saturation region transistor for gain control, and a linear region transistor for bandwidth control. This segmentation allows independent adjustment of DC gain through the saturation transistor while bandwidth is controlled by the linear region transistor and compensation capacitor, providing adaptability without excessive complexity.
3Speed
If bias current is increased to extend bandwidth, then bandwidth is improved, but power consumption increases
Solution Approach 1:
The patent changes the operating region of the compensation transistor to linear region and couples the compensation capacitor to an intermediate node, which modifies the transfer function to add beneficial poles and zeros. This allows bandwidth extension through pole-zero placement rather than simply increasing bias current, reducing power consumption while maintaining speed performance.
Data Source
AI summary
A voltage regulator includes an error amplifier producing an error voltage from a reference voltage and a feedback voltage. A voltage-to-current converter converts the error voltage to an output current, and a feedback resistance generates the feedback voltage from the output current. The error amplifier includes a differential pair of transistors receiving the feedback voltage and the reference voltage, a first pair of transistors operating in saturation and coupled to the differential pair of transistors at an output node and a bias node, a second pair of transistors operating in a linear region and coupled to the first pair of transistors at a pair of intermediate nodes. A compensation capacitor is coupled to one of the pair of intermediate nodes so as to compensate the error amplifier for a parasitic capacitance. An output at the output node is a function of a difference between the reference voltage and feedback voltage.


