Voltage Regulator Serial Parallel Interface for Dynamic VID
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Solution Overview
Problem
Existing voltage regulators require external mapping circuits to adjust supply voltages, which increase cost and occupy space, and must be reconfigured for different voltage requirements or processors, limiting flexibility and efficiency.
Innovation Solution
A voltage regulator system that allows N-bit digital values to be stored in a table and selected via a parallel interface with a bus width less than N, using a serial interface for loading, enabling dynamic voltage adjustments without external circuitry and reducing the number of control pins required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If an external mapping circuit is used to map voltage select signals to N-bit VID codes, then the GPU can adjust supply voltages with limited GPIO pins, but the device complexity and cost increase
Solution Approach 1:
The patent merges the voltage selection function directly into the voltage regulator chip, eliminating the need for external mapping circuits. The regulator internally stores N-bit VID codes and decodes them based on fewer control signals, combining multiple functions (voltage selection, code storage, decoding) into a single integrated component.
Solution Approach 2:
The patent extracts the mapping circuit functionality from the external domain and relocates it inside the voltage regulator. By taking out the mapping function and implementing it within the regulator's internal architecture, the external complexity is eliminated while maintaining voltage adjustment capability.
2Adaptability or versatility
If an external mapping circuit is used to map voltage select signals to N-bit VID codes, then the GPU can adjust supply voltages with limited GPIO pins, but the occupied space increases
Solution Approach 1:
The patent merges the voltage selection function directly into the voltage regulator chip, eliminating the need for external mapping circuits. The regulator internally stores N-bit VID codes and decodes them based on fewer control signals, combining multiple functions (voltage selection, code storage, decoding) into a single integrated component.
Solution Approach 2:
The patent extracts the mapping circuit functionality from the external domain and relocates it inside the voltage regulator. By taking out the mapping function and implementing it within the regulator's internal architecture, the external complexity is eliminated while maintaining voltage adjustment capability.
3Adaptability or versatility
If the VID mapping circuit is reconfigured to generate different VIDs for different applications or processors, then the voltage adjustment range is expanded, but the manufacturing complexity increases
Solution Approach 1:
The patent implements a dynamic voltage configuration mechanism where the regulator can load different N-bit VID code tables via serial interface. This allows the same hardware to adapt to different applications or processors by simply loading different voltage tables, eliminating the need for physical reconfiguration or different hardware versions.
Solution Approach 2:
The patent changes the configuration parameter from fixed hardware mapping to programmable voltage tables. By storing multiple voltage tables in the regulator's memory and allowing dynamic loading via serial interface, the system can adapt to different voltage requirements without manufacturing changes or complex reconfiguration.
4Device complexity
If a parallel interface with bus width less than N is used to select voltage entries, then the number of control pins is reduced, but the selection speed may be limited
Solution Approach 1:
The patent pre-loads N-bit VID codes into the voltage regulator's internal table via serial interface before voltage selection is needed. This preliminary action allows the parallel interface to simply perform fast table lookup and selection without the burden of transferring full N-bit codes during voltage changes, thereby achieving fast selection with fewer pins.
Solution Approach 2:
The patent introduces an internal table as an intermediary between the reduced-width parallel interface and the voltage generator. The table stores pre-loaded N-bit VID codes, allowing the parallel interface to select entries quickly while the intermediary handles the full N-bit code management, decoupling the interface width requirement from the data width.
Data Source
AI summary
Methods and apparatus for selecting one of a plurality of N-bit digital values stored in a table, via a parallel interface having a bus width less than N is provided. The plurality of N-bit digital values stored in the table may be loaded via a serial interface.


