Voltage Regulator Table Look-Up for Dynamic Power Plane Control
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Solution Overview
Problem
The existing dynamic voltage control methods in computing systems, particularly using serial interfaces, suffer from high latency when switching between performance states due to the time-consuming communication of target voltage levels across multiple power planes, which increases with the number of power planes and features implemented.
Innovation Solution
A voltage regulator is configured to store voltage control identifiers in a table accessible based on performance states, allowing for efficient transition to next voltage levels by using a performance state indicator and table-based indexing, reducing the number of communication bits required and latency through pulse stepping and gray-code encoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a serial interface is used to communicate voltage identifier codes from the microprocessor to the voltage regulator, then the number of pins required is reduced, but the communication time and latency increase
Solution Approach 1:
The voltage regulator pre-loads a table of voltage identifier codes into its internal memory before they are needed. When the microprocessor requests a voltage change, the regulator can immediately retrieve the pre-loaded codes from its memory table without needing to communicate each code individually over the serial interface, thus reducing communication latency while maintaining pin efficiency
Solution Approach 2:
The system anticipates future voltage regulation needs by pre-loading multiple voltage identifier codes into the regulator's memory table in advance. This cushioning approach ensures that when performance state transitions occur, the regulator already has the necessary voltage codes ready, eliminating the need for time-consuming serial communication during actual voltage transitions
2Adaptability or versatility
If the number of power planes is increased to support more features, then the functionality and versatility improve, but the communication time over the serial interface increases
Solution Approach 1:
The patent combines multiple voltage identifier codes for different power planes into a single pre-loaded table in the voltage regulator's memory. Instead of communicating each voltage code separately over the serial interface, the system merges all necessary voltage information into one comprehensive table that can be quickly accessed and applied across multiple power planes simultaneously
Solution Approach 2:
The voltage regulator pre-loads a comprehensive table containing voltage identifier codes for all supported power planes before operation. This preliminary action allows the regulator to handle multiple power plane voltage changes without requiring sequential serial communication for each plane, thus supporting increased functionality without proportionally increasing communication time
3Measurement precision
If 12-bit precision voltage levels are provided by the voltage regulator, then the voltage control precision improves, but the number of bits required for communication increases
Solution Approach 1:
Instead of communicating full 12-bit voltage precision values over the serial interface, the system uses a simplified indexing approach where the microprocessor communicates compact performance state indicators that serve as indices into the pre-loaded voltage identifier table. The actual 12-bit precision voltage codes are copied from the pre-loaded table entries rather than being transmitted, thus maintaining precision while reducing communication overhead
Solution Approach 2:
The voltage identifier codes with full 12-bit precision are pre-loaded into the regulator's memory table in advance. This preliminary action allows the system to maintain high voltage control precision while using compact performance state indicators for communication, as the detailed voltage information is already prepared and stored locally in the regulator
Data Source
AI summary
A technique for dynamically controlling microprocessor power plane voltage levels includes storing in a memory on a voltage regulator voltage control identifiers in a table accessible according to performance state. In at least one embodiment of the invention, a method includes transitioning a voltage output of a voltage regulator to a next voltage level associated with a next performance state of a processor coupled to the voltage regulator based on a performance state indicator received from the processor and a corresponding entry of a performance state table. In at least one embodiment, the method includes loading performance state table entries into a storage device on the voltage regulator circuit.


