Voltage Level Shifter Circuit With Charge-Boosted Fast Switching

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Solution Overview

Problem

Conventional voltage level shifter circuits suffer from low bandwidth due to high parasitic capacitance, which results in reduced switching speed and increased current consumption, especially due to the Miller effect, affecting the frequency response and efficiency of common-source amplifiers.

Innovation Solution

A voltage level shifting circuit with a field-effect transistor (FET) switch and a current mirror circuit, where a charge storage circuit, including capacitors and diodes, is used to manage current flow and reduce switching time by increasing current only during switching, thereby minimizing current consumption post-switching and using diodes to prevent current overflow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional common-source amplifiers are used in voltage level shifter circuits, then the circuit can provide voltage level shifting functionality, but the bandwidth is reduced due to high parasitic capacitance and Miller effect

Engineering Contradiction:
ImprovebandwidthVSAvoidparasitic capacitance
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the charge storage function from the amplifier itself and implements it separately using dedicated capacitor circuits. This separation removes the burden of charging/discharging parasitic capacitances from the amplifier, thereby eliminating the bandwidth limitation caused by the Miller effect while preserving the voltage level shifting functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements preliminary charging of capacitors before the switching event. By pre-charging the capacitors to the required voltage levels, the circuit avoids the need for the amplifier to charge these capacitors during switching, thus preventing the Miller effect from limiting the bandwidth.

Inventive Principle:
Principle #10Preliminary action

2Speed

If higher current is used to charge parasitic capacitances during switching, then switching speed improves, but current consumption increases significantly

Engineering Contradiction:
Improveswitching speedVSAvoidcurrent consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic charging of capacitors at specific moments before switching events. Instead of continuously supplying high current, the circuit periodically charges the capacitors only when needed, using low current during normal operation and temporarily higher current only during the brief charging phase, thus achieving fast switching without sustained high current consumption.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

By pre-charging capacitors before switching events, the circuit prepares the necessary charge in advance using minimal current. This eliminates the need to draw high current during the switching event itself, thereby achieving fast switching speed while maintaining low overall current consumption.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If current mirror circuits are used to provide bias currents, then the circuit can maintain stable operation, but the bandwidth is limited due to the interaction with parasitic capacitances

Engineering Contradiction:
Improvestable operationVSAvoidbandwidth
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent extracts the bandwidth-limiting capacitance charging function from the current mirror-biased amplifier path and relocates it to dedicated capacitor circuits that are charged separately. This allows the current mirror to maintain stable bias currents without being constrained by the need to rapidly charge parasitic capacitances, thus preserving both stability and bandwidth.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution allows for high current consumption only during switching, reducing it afterwards to maintain low current consumption and prevent current overflow, thereby enhancing switching speed and efficiency by optimizing current management through the use of capacitors and diodes.

Implementation Method 1

A voltage level shifting circuit with an input terminal and an output terminal is provided. The level shifting circuit has a field-effect transistor (FET) switch with a gate attached to the input terminal, a drain attached to the output terminal and a source attached to a current changing mechanism. The current changing mechanism includes a current mirror circuit having an output connected between the source and an electrical earth.

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

The output of the current mirror circuit is preferably adapted to change a current flowing between the drain and the source based on an input voltage applied to the gate. The input voltage typically produces an output voltage on the output terminal based on the current.

Methodology Applied
Scientific EffectDiode effect: Diode

Data Source

PatentUS8766696B2Fast voltage level shifter circuit
Publication Date: 2014.07.01 SOLAREDGE TECH LTD
  • US8766696B2 patent drawing
  • US8766696B2 patent drawing
  • US8766696B2 patent drawing

AI summary

A voltage level shifting circuit with an input terminal and an output terminal. The level shifting circuit has a field-effect transistor (FET) switch with a gate attached to the input terminal, a drain attached to the output terminal and a source attached to a current changing mechanism. The current changing mechanism includes a current mirror circuit having an output connected between the source and an electrical earth. The output of the current mirror circuit is preferably adapted to change a current flowing between the drain and the source based on an input voltage applied to the gate.