Multi-Stage Voltage Level Shifter for Low-Leakage Signal Translation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional voltage level shifters face challenges in efficiently translating signals between different voltage domains due to differences in NMOS and PMOS transistor operation, leading to reliability issues and high leakage and switching currents.
Innovation Solution
The design incorporates specific configurations of NMOS and PMOS transistors, including the use of larger NMOS transistors relative to PMOS transistors and the introduction of additional transistors like MP3 and MP4 to isolate NMOS transistors from PMOS transistors, reducing drive fights and improving common mode noise, along with the use of single tail transistors and additional inverters to enhance performance and area efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional voltage level shifters are used to translate signals between different voltage domains, then signal translation is achieved, but reliability deteriorates due to drive fights between NMOS and PMOS transistors and high leakage currents
Solution Approach 1:
The patent introduces intermediate voltage nodes and buffer stages between the input signal path and the internal NMOS-PMOS transistor stages. These intermediaries prevent direct conflict between opposing transistor types by decoupling their switching actions, thereby eliminating drive fights and reducing harmful leakage currents while maintaining signal translation functionality.
Solution Approach 2:
The voltage level shifter is divided into multiple independent stages, with each stage handling a portion of the voltage translation task. This segmentation isolates the NMOS and PMOS transistor operations into separate functional blocks, preventing them from interfering with each other and reducing overall leakage current by limiting the active transistor count in any single stage.
2Area of stationary object
If NMOS and PMOS transistors are used in conventional level shifters, then voltage domain translation is achieved, but area efficiency deteriorates due to the need for additional transistors to isolate drive fights
Solution Approach 1:
The patent combines the functions of signal translation and transistor isolation into a unified multi-stage architecture. By merging the voltage translation function with the drive fight prevention function in the same circuit stages, the design eliminates the need for separate isolation transistors, thereby reducing overall device area while maintaining functionality.
Solution Approach 2:
Each transistor stage in the patent performs multiple functions simultaneously: voltage level translation, drive fight prevention, and leakage current reduction. This multi-functionality eliminates the need for dedicated isolation transistors, optimizing area efficiency by ensuring every transistor contributes to multiple objectives rather than requiring separate components for each function.
Data Source
AI summary
A circuit includes first through fifth transistors. The first transistor has a first control input and first and second current terminals. The second transistor has a second control input and third and fourth current terminals. The third transistor has a third control input and fifth and sixth current terminals. The third control input is coupled to the third current terminal, and the fifth current terminal is coupled to a supply voltage node. The fourth transistor has a fourth control input and seventh and eighth current terminals. The fourth control input is coupled to the first current terminal, and the seventh current terminal coupled to the supply voltage node. The fifth transistor has a fifth control input and ninth and tenth current terminals. The fifth control input is coupled to the first control input, and the tenth current terminal coupled to the second current terminal.