Voltage Threshold Prediction for Memory Error Recovery
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Solution Overview
Problem
Existing memory sub-systems face challenges in efficiently correcting errors due to voltage threshold drift in non-volatile memory devices, particularly in mobile computing where physical space is limited and errors become more pronounced over time, leading to increased resource consumption and complexity in error handling processes.
Innovation Solution
Implementing a voltage threshold prediction component that determines the movement of the threshold voltage based on memory access operations, allowing for optimized read voltages and reducing the number of offsets tested during error recovery, thereby improving performance by focusing on either positive or negative offsets based on the behavior of memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error recovery processes test multiple voltage offsets to correct errors in non-volatile memory, then error correction reliability is improved, but computational resources and time consumption increase
Solution Approach 1:
The patent applies preliminary action by performing a read operation at the original threshold voltage before error recovery to determine the quantity of bits read. This preliminary measurement enables prediction of voltage threshold movement direction, allowing the system to pre-select which offset voltages to test (positive or negative) without trying all possible offsets, thereby reducing computational resources while maintaining error correction reliability
Solution Approach 2:
The patent changes the parameter being measured from simply detecting errors to determining the quantity of bits read at the original threshold voltage. This parameter change enables prediction of voltage threshold drift direction, allowing the system to adaptively select offset voltage signs and reduce the search space for error correction, thus improving computational efficiency without sacrificing reliability
2Reliability
If memory sub-systems perform comprehensive error recovery by testing both positive and negative voltage offsets, then error correction completeness is improved, but time consumption increases
Solution Approach 1:
The patent performs a preliminary read operation at the original threshold voltage to determine bit quantity before error recovery. This preliminary action predicts the direction of voltage threshold movement, allowing the system to skip testing offset voltages in the wrong direction and only test offsets in the predicted direction, thereby reducing error recovery time while maintaining correction completeness
Solution Approach 2:
Instead of testing all possible offset voltages (excessive action), the patent uses the predicted voltage threshold movement direction to test only the necessary subset of offsets (partial action). This selective approach tests only positive offsets or only negative offsets based on prediction, reducing time consumption while ensuring complete error correction for the actual error conditions present
3Reliability
If voltage threshold drift is not predicted and all offset voltages are tested, then error recovery thoroughness is improved, but device complexity increases
Solution Approach 1:
The patent introduces a preliminary read operation that determines the quantity of bits read at the original threshold voltage. This preliminary measurement forms the basis for predicting voltage threshold drift direction, simplifying the subsequent error recovery process by eliminating the need for complex algorithms to test all offset voltages, thus reducing device complexity while maintaining thoroughness
Solution Approach 2:
The patent implements feedback by using the quantity of bits read at the original threshold voltage to predict voltage threshold movement direction. This feedback mechanism guides the selection of offset voltages for error recovery, creating a closed-loop system that adapts to actual memory cell behavior, thereby simplifying the error handling process while ensuring thorough error recovery
Data Source
AI summary
A method includes performing a first read operation involving a set of memory cells using a first voltage, determining a quantity of bits associated with the set of memory cells based on the first read operation, performing a second read operation involving the set of memory cells using a second voltage that is greater than the first voltage when the quantity of bits is above a threshold quantity of bits for the set of memory cells, and performing the second read operation involving the set of memory cells using a third voltage that is less than the first voltage when the quantity of bits is below the threshold quantity of bits for the set of memory cells.