Voltage-Tolerant Level Shifter for Fast Reliable Domain Conversion
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Solution Overview
Problem
Level shifters in multi-chip systems face reliability issues due to voltage stresses and operational speed limitations, particularly when converting signals between different voltage domains, leading to potential reliability problems and fighting between complementary output signals.
Innovation Solution
A level shifter design incorporating a control circuit with resistive-capacitive networks and latch circuits that adjust signal levels during level transitions to reduce voltage stress and enhance operational speed by actively managing the coupling of circuit paths and discharging paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a level shifter converts signals between different voltage domains in multi-chip systems, then communication between chips is enabled, but voltage stress causes reliability problems
Solution Approach 1:
The control circuit activates the circuit path between the first and second voltage domains before the voltage level transition occurs. This preliminary activation ensures that the path is ready and reduces voltage stress during the actual transition, thereby maintaining reliability while enabling voltage domain conversion.
Solution Approach 2:
The control circuit acts as an intermediary that manages the coupling between different voltage domains. It selectively activates circuit paths based on voltage levels, preventing direct exposure of circuit elements to harmful voltage stress while maintaining the ability to convert between voltage domains.
2Reliability
If a level shifter operates in high voltage modes to extend reliability, then voltage stress is reduced, but operational speed decreases
Solution Approach 1:
The level shifter dynamically switches between different circuit paths based on operating conditions. The control circuit selectively couples circuit paths according to voltage levels, allowing the system to optimize between reliability and speed by choosing appropriate paths for different operational modes.
Solution Approach 2:
The system changes operational parameters by selectively activating different circuit paths. By adjusting which paths are coupled based on voltage levels, the system can modify its effective resistance and capacitance characteristics to balance speed and reliability requirements.
3Reliability
If complementary output signals are generated for level shifting, then signal integrity is improved, but fighting between signals occurs
Solution Approach 1:
The control circuit monitors voltage levels and uses this feedback to selectively activate circuit paths. This feedback mechanism ensures that complementary signals are only generated when the appropriate circuit paths are active, preventing signal fighting while maintaining signal integrity.
Solution Approach 2:
The control circuit prevents signal fighting by activating the appropriate circuit path before the voltage transition occurs. This preliminary action ensures that only one complementary signal is active at a time, eliminating the harmful fighting effect while maintaining signal integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed level shifter extends the reliability of circuit elements by reducing voltage stress and alleviating fighting problems between complementary signals, thereby improving operational speed and reliability in high voltage modes.
Implementation Method 1
a control circuit such as one or more resistive-capacitive networks to reduce a voltage stress across a circuit element of the level shifter
Data Source
AI summary
A level shifter includes a latch circuit, an input stage, a driver stage and a control circuit. The latch circuit is configured to generate an output signal according to a signal level at a first drive node and a signal level at a second drive node. The input stage is configured to receive an input signal to adjust a signal level at a connection node. The driver stage is configured to drive the first drive node by coupling the connection node to the first drive node according to a set of control signals. The control circuit is coupled to the input stage and the driver stage. The control circuit is configured to control the driver stage to couple the connection node to the first drive node by adjusting a signal level of each control signal in the set of control signals during a level transition of the input signal.