Bidirectional Voltage Translator With Adaptive Output Staggering

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Solution Overview

Problem

Bidirectional voltage-level translators face challenges in maintaining monotonic output signals across wide voltage ranges, leading to glitches and errors due to parasitic interactions and unnecessary staggering, which reduces data rate and increases propagation delays.

Innovation Solution

A bidirectional voltage-level translator with a supply-difference sensing circuit that enables or disables staggering based on voltage supply differences, using P-type and N-type field effect transistors in parallel with resistors to control output buffering, ensuring that staggering is only applied when necessary, thereby optimizing data rate and reducing noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If staggering is applied to maintain monotonic output signals during low-to-high voltage translation, then output signal monotonicity is improved, but data rate decreases and propagation delays increase

Engineering Contradiction:
Improveoutput signal monotonicityVSAvoiddata rate
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic control of the staggering circuit by a supply difference sensing mechanism. The circuit automatically adjusts its behavior based on real-time voltage conditions: when supply voltage difference exceeds a threshold during low-to-high translation, staggering is enabled to ensure monotonicity; when supply voltage difference is within acceptable range or during high-to-low translation, staggering is disabled to maximize data rate. This dynamic adaptation resolves the contradiction by making the monotonicity enhancement conditional rather than constant.

Inventive Principle:
Principle #15Dynamics

2Reliability

If staggering circuit is always enabled, then output signal monotonicity is maintained across all voltage conditions, but unnecessary staggering reduces data rate and increases power consumption

Engineering Contradiction:
Improveoutput signal monotonicityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The supply difference sensing circuit operates autonomously to monitor voltage conditions and automatically control the staggering circuit's enable/disable state without external intervention. The sensing circuit compares the difference between input and output supply voltages against a predefined threshold and activates or deactivates staggering accordingly. This self-service mechanism ensures monotonicity only when genuinely needed, eliminating wasteful power consumption during conditions where staggering provides no benefit.

Inventive Principle:
Principle #25Self-service

3Reliability

If staggering is used for wide voltage range translation, then monotonic behavior is maintained, but parasitic interactions increase causing glitches and errors

Engineering Contradiction:
Improvemonotonic behaviorVSAvoidparasitic interactions
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies staggering selectively only to the specific condition of low-to-high voltage translation when supply voltage difference exceeds a threshold, rather than applying it universally. The supply difference sensing circuit identifies this specific local condition and activates staggering only there. This localized application minimizes parasitic interactions and glitch generation while still maintaining monotonic behavior where it is genuinely required, avoiding the harmful effects of unnecessary staggering in other operating conditions.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10862484B2Bidirectional voltage level translator having output driver staggering controlled by voltage supply
Publication Date: 2020.12.08 TEXAS INSTRUMENTS INC
  • US10862484B2 patent drawing
  • US10862484B2 patent drawing
  • US10862484B2 patent drawing

AI summary

A voltage level translator translates signals between first and second voltage domains. An output buffer for a channel thereof includes a first plurality of PFETs and a first plurality of NFETS that are coupled to provide staggering of the output signal. A supply difference sensing circuit can disable staggering when an input voltage supply is greater than or equal to a VCCI trigger for the output voltage supply.