Low-to-High Voltage Translator Without Regenerative Feedback

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Solution Overview

Problem

Existing voltage translators fail to efficiently translate low core voltages to high I/O voltages with minimal power dissipation and maintain accurate transition times, especially when the voltage difference is large, such as from 0.8V to 3.6V, due to regenerative feedback issues and static power dissipation.

Innovation Solution

A voltage translator circuit that does not use cross-coupled gates with regenerative feedback, employing a series of switching and inverting elements with complementary biasing to rapidly translate low to high voltage levels without feedback, reducing static power dissipation and hardware requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If cross-coupled gates with regenerative feedback are used to translate low voltage to high voltage, then the translation speed is improved, but static power dissipation increases and the circuit fails when voltage difference is large

Engineering Contradiction:
Improvetranslation speedVSAvoidstatic power dissipation
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent removes the regenerative feedback mechanism from the voltage translator circuit. By taking out the cross-coupled gates that create the feedback loop, the circuit eliminates the source of static power dissipation while maintaining the voltage translation function through a simpler direct translation path.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The voltage translation function is segmented into separate stages: a low-voltage stage that processes the input signal and a high-voltage stage that produces the output signal. This segmentation allows each stage to operate at its optimal voltage level without the need for regenerative feedback, reducing power dissipation.

Inventive Principle:
Principle #1Segmentation

2Loss of time

If regenerative feedback is used in voltage translation, then transition time is reduced, but the circuit becomes unreliable when voltage difference between core and I/O is large

Engineering Contradiction:
Improvetransition timeVSAvoidcircuit reliability
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent changes the operating parameters of the translation circuit by removing the regenerative feedback mechanism. This parameter change allows the circuit to operate reliably across large voltage differences (0.8V to 3.6V) without the instability and distortion issues that plague feedback-based designs under extreme conditions.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If voltage translators are designed for high-frequency operation (250 MHz or more), then the translator must meet high frequency requirements, but power dissipation increases

Engineering Contradiction:
Improveoperating frequencyVSAvoidpower dissipation
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent employs periodic switching action in the voltage translator circuit, where switching elements operate in synchronized periods to achieve high-frequency translation. This periodic operation allows the circuit to meet 250 MHz and higher frequency requirements while minimizing power dissipation by ensuring switches are fully on or off rather than in transition states.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS7999573B2Low-voltage-to-high-voltage level converter for digital signals and related integrated circuit, system, and method
Publication Date: 2011.08.16 STMICROELECTRONICS PVT LTD
  • US7999573B2 patent drawing
  • US7999573B2 patent drawing
  • US7999573B2 patent drawing

AI summary

An embodiment of a low-to-high-level voltage translator is proposed. This translator translates the low voltage swing signals for the core into high voltage swing signals of the I/O blocks. This translator may be particularly useful for high-speed application where the difference between the core and the I/O supply voltage is very large, e.g., the core is working at 0.8V and the I/O is working at 3.6V or higher without little or no static power dissipation. The proposed translator may give improved transition times and propagation delays as compared to conventional translators. The proposed translator may also use less hardware in comparison to other such translators.