Volterra-Series Digital Predistortion With LUT Interpolation
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Solution Overview
Problem
Traditional digital pre-distortion (DPD) systems for wireless communication devices face complexity and cost inefficiencies due to the need for significant digital processing resources to evaluate polynomials for linearizing power amplifiers, particularly in handling higher-order Volterra series terms and cross-terms, which limits their scalability and adaptation speed.
Innovation Solution
A single chip digital front end processor with integrated predistorter hardware cells using look-up tables (LUTs) for interpolating and generating Volterra series memory polynomial terms and higher-order cross-terms, allowing for flexible and efficient digital pre-distortion of composite multi-carrier waveforms, with cascaded predistorter cells to compute complex polynomials and adapt to non-linear power amplifier characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional polynomial evaluation methods are used for digital pre-distortion, then linearization performance is achieved, but processing complexity and digital processing resource requirements increase significantly
Solution Approach 1:
The patent segments the polynomial evaluation process into multiple stages using a tree-structured architecture. Higher-order Volterra series terms are computed separately from lower-order terms, and cross-terms are generated through systematic combination of basis functions. This segmentation allows parallel computation of different term groups, reducing overall processing complexity while maintaining complete linearization performance.
Solution Approach 2:
The patent implements dynamic coefficient adaptation where polynomial coefficients are updated in real-time based on feedback from the power amplifier output. The system dynamically adjusts the predistortion coefficients to track changes in amplifier characteristics, enabling adaptive linearization that maintains performance under varying operating conditions without requiring complete re-evaluation of the polynomial model.
2Reliability
If higher-order Volterra series terms are included for better linearization, then distortion compensation improves, but processing resources and computational load increase
Solution Approach 1:
The patent pre-computes and stores basis functions and their combinations in a tree-structured memory architecture before actual predistortion operation. The hierarchical structure allows higher-order terms to be built from pre-computed lower-order basis functions, eliminating redundant calculations. This preliminary organization of computational elements significantly reduces real-time processing resources while enabling complete higher-order Volterra series evaluation for superior distortion compensation.
3Loss of energy
If power amplifier operates at maximum output power, then efficiency improves, but non-linear distortion and spurious emissions increase
Solution Approach 1:
The patent applies preliminary anti-action by computing predistortion coefficients that are the inverse of the power amplifier's non-linear characteristics before signal amplification. The Volterra series model characterizes the amplifier's non-linear behavior, and the predistorter applies equal but opposite non-linearities to the input signal. This preliminary correction counteracts the upcoming distortion, allowing the amplifier to operate at maximum efficiency while delivering linear output signal.
4Measurement precision
If adaptive predistortion is implemented to track amplifier characteristics, then linearization accuracy improves, but processing speed and adaptation time requirements increase
Solution Approach 1:
The patent implements dynamic coefficient adaptation with optimized update algorithms that adjust predistortion parameters in real-time based on feedback from the power amplifier output. The adaptive algorithm uses gradient descent or least-squares methods to update coefficients incrementally, achieving high linearization accuracy without requiring complete re-computation of the Volterra series model. This dynamic adaptation maintains precision while enabling fast tracking of amplifier characteristic changes.
Data Source
AI summary
A method is described for predistorting an input signal to compensate for non-linearities caused to the input signal in producing an output signal. The method comprises: providing an input for receiving a first input signal as a plurality of signal samples, x[n], to be transmitted over a non-linear element; providing at least one digital predistortion block comprising, a plurality of IQ predistorter cells coupled to the input, each comprising a lookup table (LUT) for generating an LUT output. The at least one digital predistortion block block is configured to apply interpolation between LUT entries for the plurality of LUTs; and generate an output signal, y[n], by each of the plurality of IQ predistorter cells by adaptively modifying the first input signal using interpolated LUT entries to compensate for distortion effects in the non-linear element. A combiner may be provided configured to combine the output signal samples, yQ, from the plurality of IQ predistorter cells into a combined signal to generate the output signal, y[n], for transmission to the non-linear element. An error calculation block may be coupled to a digital predistortion adaptation block to determine and modify a predistortion performance.