Digital Voltmeter Area Reduction via Comparator Pulse Counting
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Solution Overview
Problem
Existing digital voltmeters for on-chip testing in integrated circuits face challenges due to the use of operational amplifiers, which require significant chip area and suffer from mismatch and gain errors, with no means for calibration, making them unsuitable for built-in self-test applications.
Innovation Solution
A digital voltmeter system utilizing a comparator, current source, and capacitor for analog-to-digital conversion, with a multiplexer for selecting between input and reference voltages, and a digital core for pulse counting, which minimizes errors by using a relative pulse count scheme and optimizing ramp directions to reduce chip area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an operational amplifier is used for analog-to-digital conversion in a digital voltmeter, then the conversion function is achieved, but the chip area required increases significantly
Solution Approach 1:
The patent extracts and removes the operational amplifier from the analog-to-digital conversion circuit, replacing it with a comparator-based architecture. This extraction eliminates the large area requirement of the op-amp while maintaining the essential voltage measurement function through a different circuit topology involving a capacitor, current source, and comparator.
Solution Approach 2:
The patent employs a capacitor that is repeatedly charged and discharged in each measurement cycle. This capacitor acts as a temporary, disposable energy storage element that enables the conversion function without requiring the continuous operation and large area of an operational amplifier. The capacitor is reset and reused in each cycle, providing an area-efficient solution.
2Measurement precision
If an operational amplifier is used for analog-to-digital conversion, then voltage measurement is enabled, but mismatch and gain errors occur with no calibration means
Solution Approach 1:
The patent implements a feedback mechanism where the digital output is converted back to an analog voltage and compared with the input voltage. This feedback loop enables automatic calibration and correction of gain and offset errors, eliminating the mismatch and gain errors that plague operational amplifier-based designs. The system self-corrects by adjusting the digital-to-analog conversion based on the comparison result.
Solution Approach 2:
The patent replaces the operational amplifier's continuous analog operation with a discrete, event-driven comparator-based system. This substitution eliminates the analog imperfections (mismatch and gain errors) inherent in operational amplifiers by using a digital-centric approach where the comparator provides crisp, binary decision-making without the analog accumulation of errors.
3Measurement precision
If traditional DVM architecture is used, then voltage measurement function is provided, but power consumption increases
Solution Approach 1:
The patent employs periodic action by resetting the capacitor to a known voltage level at the beginning of each measurement cycle and then allowing it to charge or discharge until the comparator triggers. This periodic reset-and-measure approach enables the system to operate in discrete bursts rather than continuously, significantly reducing average power consumption compared to traditional operational amplifier-based DVMs that require continuous operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enables efficient, area- and power-effective on-chip voltage measurement, reducing mismatch and gain errors through relative pulse counting and optimized ramping, facilitating accurate voltage monitoring and testing without the need for calibration.
Implementation Method 1
a capacitor (24)
Implementation Method 2
A digital voltmeter can be implemented by an analog-to-digital converter (ADC) circuit
Data Source
AI summary
A digital voltmeter, where a number of clock pulses for a first ramp voltage to reach an input voltage is determined. Next, a number of clock pulses for a second ramp voltage to reach the input voltage is determined. One of the first and the second ramp voltages having a least number of clock pulses to reach the input voltage is determined. A determination is made for a number of clock pulses for the determined one of the first and the second ramp voltages to reach a reference voltage. A digital code is generated for the input voltage based on the determined number of clock pulses for reaching the reference voltage and the determined least number of clock pulses for reaching the input voltage.