Volume Matrix Multi-Path Storage Architecture
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Solution Overview
Problem
In computer systems with open storage architectures, single queues or paths to logical devices lead to significant delays, especially when the queue fills up or cache hits are preceded by cache misses, and existing techniques to mitigate this issue are inefficient and lack scalability.
Innovation Solution
The implementation of a volume matrix that maps host devices to virtual and logical devices, allowing for multiple alternative paths, where primary and secondary address ranges are used to distribute storage requests based on performance criteria, reducing bottlenecks and efficiently utilizing hardware and software resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If multiple independent queues/paths are employed to reduce storage request delays, then storage request delay is reduced, but hardware and software resource duplication increases and scalability deteriorates
Solution Approach 1:
The patent implements multi-path I/O capability that allows a single queue to utilize multiple paths to the same logical device. The system dynamically selects among available paths (primary and secondary) without requiring separate queues for each path, thereby reducing storage request delays while avoiding the resource duplication associated with multiple independent queues.
Solution Approach 2:
The system dynamically selects paths based on current system conditions and performance criteria. The path selection is not static but adapts to changing conditions, allowing the single queue to leverage multiple paths as needed to reduce delays without permanently duplicating resources for each potential path.
2Loss of time
If multiple host queues and paths are defined for each logical device, then average delay for storage requests is reduced, but duplication of resources at host and data storage system increases
Solution Approach 1:
The patent enables multiple paths to be shared among queues through the volume matrix architecture. Instead of dedicating separate queues and paths to each logical device, the system allows queues to access multiple paths dynamically, reducing the need for resource duplication while maintaining reduced delay performance.
Solution Approach 2:
The volume matrix merges the concepts of queues and paths into a unified structure where multiple paths are associated with logical devices and can be accessed by queues without requiring separate queue instances for each path. This combining approach reduces resource duplication while achieving the goal of reduced average delay.
3Device complexity
If a single queue/path is used to a logical device, then hardware and software resources are efficiently utilized, but significant delays occur when the queue fills up or under certain cache operating conditions
Solution Approach 1:
The system maintains a single queue structure for resource efficiency but dynamically selects among multiple paths based on current conditions. When the single queue fills up or when cache conditions indicate potential delays, the system can switch to alternative paths without requiring multiple independent queues, thus maintaining resource efficiency while reducing delays.
Solution Approach 2:
The volume matrix acts as an intermediary layer between the single queue and the multiple paths to logical devices. It manages the mapping and selection of paths dynamically, allowing the single queue to access multiple paths as needed to avoid delays while maintaining the simplicity and resource efficiency of a single queue structure.
Data Source
AI summary
A volume matrix is established including host devices on a host computer and virtual devices and logical devices on a data storage system. Each host device/virtual device (H/V) pair has a user-visible primary address range to serve as a primary H/V pair on a primary path for a logical device, and selected H/V pairs also have one or more user-hidden secondary address ranges to serve as secondary H/V pairs on secondary paths for other logical devices. The host computer directs storage requests to either the primary path or a secondary path to a target logical device based on expected performance criteria, and if a secondary path is used then the address is translated to the correct secondary address range. The data storage system performs the storage request on the target logical device after determining whether the request was received on the primary path or a secondary path, in which case the storage address is further translated to an address range of the target logical device. The secondary address ranges create secondary paths to reduce queuing-related delays without requiring inefficient duplication of system resources.