Virtual Output Queue Linked List Management for Switch Fabric

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Solution Overview

Problem

High-performance network fabric switches face challenges in efficiently managing virtual output queues (VOQs) due to high power consumption and chip area requirements, which affect their switching efficiency and latency.

Innovation Solution

A linked list management scheme is implemented for VOQs, utilizing look-ahead pointers to schedule reads of memory locations at the same speed as data storage, allowing for simultaneous reading of next and subsequent descriptors, thereby increasing data retrieval and storage rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional VOQ management schemes are used to ensure high-speed packet switching, then switching efficiency is improved, but power consumption and chip area increase

Engineering Contradiction:
Improveswitching efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The patent applies preliminary action by implementing a look-ahead mechanism that pre-fetches descriptor information from memory before it is actually needed for packet transmission. The system reads ahead pointers in the descriptor linked list in advance, allowing the arbitration logic to be prepared for the next packet switching decision before the current packet is fully transmitted. This reduces waiting time and improves switching efficiency without requiring higher clock frequencies, thereby avoiding increased power consumption.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If traditional VOQ management schemes are used to ensure high-speed packet switching, then switching efficiency is improved, but chip area increases

Engineering Contradiction:
Improveswitching efficiencyVSAvoidchip area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent uses preliminary action to fetch descriptor data ahead of time, allowing the switch fabric to maintain high switching efficiency without requiring large on-chip buffers or complex arbitration structures. By preparing descriptor information in advance through the look-ahead read mechanism, the system reduces the need for large chip area dedicated to queue management structures while maintaining high throughput.

Inventive Principle:
Principle #10Preliminary action

3Speed

If clock frequency is increased to improve data retrieval speed, then data retrieval rate is improved, but power consumption increases

Engineering Contradiction:
Improvedata retrieval rateVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by stationary object

Solution Approach 1:

The patent implements preliminary action by reading descriptor information ahead of time using look-ahead pointers. This allows the system to maintain high data retrieval rates without increasing clock frequency, because the descriptor data is already prepared and available when needed for packet transmission decisions. The look-ahead mechanism decouples data retrieval speed from clock frequency, avoiding the power consumption penalty of higher clock speeds.

Inventive Principle:
Principle #10Preliminary action

4Loss of time

If arbitration time is reduced to improve switching performance, then latency is reduced, but system complexity increases

Engineering Contradiction:
ImprovelatencyVSAvoidsystem complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-fetching and caching descriptor information before arbitration is needed. The look-ahead read mechanism retrieves the next descriptor in the linked list in advance, so when arbitration time comes around, the data is already prepared and immediately available. This reduces latency without significantly increasing system complexity, as the mechanism uses existing descriptor linked list structures with additional look-ahead pointers.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9531641B2Virtual output queue linked list management scheme for switch fabric
Publication Date: 2016.12.27 ORACLE INT CORP
  • US9531641B2 patent drawing
  • US9531641B2 patent drawing
  • US9531641B2 patent drawing

AI summary

Implementations of the present disclosure involve an apparatus, device, component, and/or method for a virtual output queue linked list management scheme for a high-performance network switch. In general, the linked list management scheme utilizes one or more look-ahead links associated with one or more descriptors in the linked list of descriptors that describe the storage of the incoming data packets to the switch. The look-ahead links allow the switch to schedule reads of memory locations included in the descriptors at the same speed at which the data packets are stored in memory.