Voting Integrated Circuit for Multi-Processor Synchronization
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Solution Overview
Problem
Computer systems operating in high radiation environments, such as space, are vulnerable to single event upsets (SEUs) and faults due to cosmic rays and radiation effects, which can cause data corruption and system failures.
Innovation Solution
A fault-tolerant computing system that synchronizes multiple processing devices based on transactions or operations performed, using voting techniques to verify and validate outputs and mitigate the effects of upsets or faults, allowing the system to continue operating without propagating errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If radiation hardened devices are used to improve data reliability, then reliability is improved, but cost increases and performance degrades
Solution Approach 1:
The patent uses multiple copies of standard (non-radiation-hardened) processing devices to perform the same computation. By executing identical instructions on multiple copies and comparing outputs, the system achieves fault tolerance without requiring radiation-hardened components, thus avoiding their high cost and performance penalties.
Solution Approach 2:
The patent introduces a voting mechanism as an intermediary layer between the processing devices and the final output. This voting logic compares results from multiple processing devices and selects the correct output, acting as a mediator that provides reliability without requiring the processing devices themselves to be radiation-hardened.
2Reliability
If custom ASICs with lock-step computing are used to improve reliability, then reliability is improved, but cost and manufacturing complexity increase
Solution Approach 1:
The patent uses standard, commercially available processing devices that can be manufactured using established processes. By making the system universal and compatible with off-the-shelf components, it avoids the need for custom ASIC design and manufacturing, significantly improving ease of manufacture while maintaining reliability through software-based fault tolerance.
Solution Approach 2:
Instead of using custom-designed ASICs, the patent creates multiple copies of standard processing devices. This approach leverages existing manufacturing capabilities and supply chains, making the system easier to manufacture while achieving the same fault tolerance goals through parallel execution and voting.
3Reliability
If multiple processing devices are synchronized to improve reliability, then reliability is improved, but computational performance may degrade
Solution Approach 1:
The patent applies synchronization and voting only when needed for fault tolerance, rather than continuously. By using asynchronous execution where possible and only synchronizing for output validation, the system minimizes the performance overhead while maintaining reliability, avoiding excessive synchronization that would degrade computational performance.
Solution Approach 2:
The patent maintains continuous computational progress by allowing processing devices to execute instructions asynchronously and independently. The voting mechanism operates continuously to validate outputs without stopping the computational flow, ensuring that useful action continues uninterrupted while reliability is maintained.
Data Source
AI summary
The present application relates to systems, methods, and apparatus for synchronization of multiple processing devices. An exemplary system may include a memory device configured to store instructions and data for processing devices. A voting integrated circuit may be coupled to the memory device. The voting integrated circuit may be configured to receive output data from each of a plurality of processing devices and to perform voting between the output data to determine whether a plurality of output data is identical. The voting integrated circuit may be implemented using a field programmable gate array (FPGA).