Vpass Voltage Tracking for NAND Flash Program Disturb
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Solution Overview
Problem
As NAND flash memory scales, parasitic capacitance coupling leads to program disturb in neighboring cells, causing over-programming due to increased program/erase cycles, which narrows the voltage difference between programmed and erased states, making cells more susceptible to over-programming.
Innovation Solution
The Vpass voltage automatically tracks and adjusts in response to the program voltage (Vpgm), either by maintaining a predetermined ratio with Vpgm or decreasing as program/erase cycles increase, to minimize program disturb effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If NAND flash memory is scaled to increase memory density, then memory capacity is improved, but parasitic capacitance coupling between word lines increases causing program disturb in neighboring cells
Solution Approach 1:
The patent dynamically adjusts the Vpass voltage parameter based on the program voltage (Vpgm) applied to selected word lines. By tracking Vpgm and maintaining Vpass as a predetermined ratio of Vpgm, the system adapts the pass voltage to compensate for parasitic coupling effects that increase with memory scaling, thereby reducing program disturb while preserving memory capacity improvements
Solution Approach 2:
The system implements a feedback mechanism where the Vpass voltage is automatically adjusted in response to the program voltage applied to selected word lines. The controller monitors Vpgm levels and dynamically modifies Vpass accordingly, creating a closed-loop control system that compensates for varying parasitic coupling conditions as memory is scaled and programmed
2Productivity
If the number of program/erase cycles increases to utilize more memory capacity, then memory utilization is improved, but the voltage difference between programmed and erased states narrows making cells more susceptible to over-programming
Solution Approach 1:
The patent transitions from a static Vpass voltage approach to a dynamic adjustment mechanism. The Vpass voltage is continuously adapted based on the current program voltage and the number of program/erase cycles experienced by the memory block. This dynamic approach allows the system to maintain optimal voltage margins even as cells degrade over multiple cycles, preventing over-programming while maximizing memory utilization
Solution Approach 2:
The system performs preliminary adjustment of the Vpass voltage before programming operations based on the program voltage that will be applied. By proactively setting Vpass to an appropriate level before the programming pulse is applied, the system prevents program disturb and over-programming from occurring in the first place, rather than attempting to correct issues after they arise
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the failure rate of program disturb by optimizing Vpass voltage levels, maintaining memory cell integrity and preventing over-programming as the number of program/erase cycles grows.
Implementation Method 1
parasitic capacitance coupling between the selected word line and adjacent word lines becomes problematic
Data Source
AI summary
A selected word line that is coupled to cells for programming is biased with an initial programming voltage. The unselected wordlines that are adjacent to the selected word line are biased at an initial Vpass. As the quantity of program/erase cycles on the memory device increases, the programming voltage required to successfully program the cells decreases incrementally. Vpass tracks the decrease of the programming voltage.