Voltage Regulator Charge Isolation for Fast SoC Wake-Up
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Solution Overview
Problem
Voltage regulators in computing systems face challenges in reducing power consumption due to repeated charging and discharging of bulk capacitors, leading to energy loss, increased latency, and acoustic noise during processor transitions between active and idle states.
Innovation Solution
Implementing a charge isolation architecture where bulk capacitors are isolated during idle states to prevent energy loss and reused during active states, using switches controlled by a VR controller to maintain voltage across capacitors, reducing inrush current and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If bulk capacitors are continuously charged and discharged during processor state transitions, then power can be supplied to the processor, but energy is lost and battery life is reduced
Solution Approach 1:
The patent segments the capacitor system into two distinct groups: bulk capacitors (first set) that remain isolated and retain their charge, and output capacitors (second set) that are connected to supply power during active states. This segmentation allows the bulk capacitors to maintain their charge without being repeatedly charged and discharged, thereby reducing energy loss while still enabling power supply to the processor during active states through the output capacitors.
2Speed
If bulk capacitors are charged quickly to restore voltage, then processor responsiveness is improved, but inrush current increases and causes acoustic noise
Solution Approach 1:
The patent segments the capacitor system into bulk capacitors that remain isolated and retain their charge, and output capacitors that are connected to supply power during active states. This segmentation eliminates the need for rapid recharging of large bulk capacitors, thereby reducing inrush current and associated acoustic noise while maintaining processor responsiveness through the output capacitors.
3Loss of energy
If switches are added to isolate capacitors, then energy loss is reduced, but device complexity increases
Solution Approach 1:
The patent segments the capacitor system into bulk capacitors and output capacitors with switches controlling their connection states. The switches are controlled based on processor state (active or idle), enabling energy conservation during idle states while maintaining power supply capability during active states. This segmentation approach reduces energy loss through strategic isolation while managing complexity through state-based control.
Solution Approach 2:
The patent applies preliminary action by pre-charging the bulk capacitors to the target voltage before the processor enters idle state. This preliminary charging ensures that when the processor transitions to active state, the capacitors are already charged and ready to supply power immediately, eliminating the need for rapid recharging and reducing energy loss from repeated charge cycles.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances efficiency by conserving capacitor charge, reducing latency, and minimizing acoustic noise, thereby improving battery life and responsiveness in computing systems.
Implementation Method 1
a path coupled to the power output rail and ground, the path comprising a switch and a capacitor
Implementation Method 2
the controller is to turn off the switch when the signal indicates the circuit transitions from the active state to the idle state
Data Source
AI summary
Embodiments herein relate to a voltage regulator (VR) circuit which reduces power consumption and latency when an associated system on a chip (SoC) or other processor transitions between active and idle states. The circuit includes bulk capacitors coupled to a power output rail of the VR, and switches which isolate the capacitors when the SoC is in the idle state. The capacitors maintain their charge so they do not have to be charged up in an idle to active state transition. In this transition, the voltage on the output power rail can be monitored and the switches can be turned on to remove the isolation when the voltage reaches a threshold level. A VR controller can subsequently provide a power good signal to the SoC to allow it to begin performing operations in the active state.


