VR Display Timing Controller Address Reset Signal Latency

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Solution Overview

Problem

Virtual reality display devices experience latency and brightness issues, leading to user discomfort and virtual reality sickness due to the proximity of the display to the human eye and inconsistencies in motion synchronization, which restricts usage time.

Innovation Solution

A display device with a timing controller that receives an address reset signal to adjust the pulse of the address reset signal, transmitting a gate reset signal to the gate driving unit, and controlling light-emission brightness through a compensation light-emission signal, reducing latency and compensating for brightness changes during user motion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If the display device operates with standard addressing timing, then the system complexity is low, but the latency increases causing virtual reality sickness

Engineering Contradiction:
ImprovelatencyVSAvoidsystem complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The timing controller performs preliminary actions by detecting motion occurrence during the emission period and preparing address reset signaling in advance. The system preemptively adjusts addressing timing by transmitting address reset signals to the gate driving unit before the next frame's addressing phase begins, thereby reducing latency without requiring complex real-time modifications during active display operations

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts the addressing timing by varying the timing of address reset signals based on detected motion conditions. When motion is detected, the timing controller modifies the gate signal timing to reset addressing earlier, creating a dynamic adaptation mechanism that reduces latency only when necessary rather than maintaining fixed complex timing circuits

Inventive Principle:
Principle #15Dynamics

2Reliability

If the address reset signal pulse is extended to ensure proper resetting, then the reliability of motion compensation improves, but the brightness compensation becomes insufficient

Engineering Contradiction:
Improvemotion compensation reliabilityVSAvoidbrightness
Core Design Contradiction:
ReliabilityVSIllumination intensity

Solution Approach 1:

The timing controller segments the address reset signal into distinct phases: a first address reset signal during the emission period for reliable motion compensation, and a second address reset signal during the blanking period for maintaining display stability. This segmentation allows the system to achieve both reliable motion compensation and adequate brightness by distributing reset functions across different time periods rather than extending a single signal

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system employs periodic action by transmitting address reset signals at specific periodic intervals - one during the emission period when motion detection is most critical, and another during the blanking period to maintain proper display timing. This periodic approach ensures reliable motion compensation occurs at key moments without continuously extending signal duration that would reduce brightness

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10748493B2Display device for driving and compensating low latency virtual reality
Publication Date: 2020.08.18 LG DISPLAY CO LTD
  • US10748493B2 patent drawing
  • US10748493B2 patent drawing
  • US10748493B2 patent drawing

AI summary

The present disclosure relates to a display device for driving virtual reality with low latency and compensating the reduced brightness. According to the present disclosure, a display device is provided, and the display device includes a timing controller for receiving a data signal and a timing signal from a host system, a data driving unit for receiving a drive signal from the timing controller, a gate driving unit for receiving a drive signal from the timing controller, a display panel having a plurality of sub-pixels and for displaying a video based on the signals received from the data driving unit and the gate driving unit, and a power supply unit for supplying power to the data driving unit, the gate driving unit, and the display panel; and the timing controller receives an address reset signal from the host system.