VREAD Modulation for Hot-Cold VTH Mismatch in NAND Flash
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Solution Overview
Problem
NAND flash memory experiences increased variability in memory cell characteristics over temperature, leading to inconsistent threshold voltage shifts across different locations within a NAND string, which affects data reliability and increases bit errors.
Innovation Solution
Adjusting word line voltages during read operations based on temperature and location within the NAND string to compensate for threshold voltage variations, using VREAD modulation to reduce word line dependence and achieve uniform temperature-induced shifts in threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If NAND flash memory is scaled to reduce cost per bit, then manufacturing cost decreases, but variability in memory cell characteristics over temperature increases
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the VREAD voltage level based on detected temperature conditions. When hot temperature is detected, a first VREAD voltage level is applied, and when cold temperature is detected, a second VREAD voltage level is applied. This compensates for the increased variability in memory cell characteristics over temperature, resolving the contradiction between manufacturing scalability and reliability.
2Quantity of substance
If process geometries are shrunk to increase memory density, then storage capacity increases, but threshold voltage variability over temperature increases
Solution Approach 1:
The patent changes the electrical parameter (VREAD voltage level) in response to temperature variations to compensate for threshold voltage inconsistency. The control circuit detects temperature and selectively applies different VREAD voltage levels to maintain consistent read operations despite geometric scaling effects, thereby preserving manufacturing precision while achieving high density.
Solution Approach 2:
The patent implements a feedback mechanism where the control circuit continuously monitors temperature conditions and adjusts the VREAD voltage level accordingly. This closed-loop control compensates for temperature-induced threshold voltage variations, maintaining precision in scaled geometries while preserving high memory density.
3Device complexity
If standard read voltage is used across all temperature conditions, then device complexity is minimized, but bit error rate increases
Solution Approach 1:
The patent introduces dynamics by making the VREAD voltage level adaptive rather than fixed. The control circuit dynamically selects between a first voltage level for hot temperatures and a second voltage level for cold temperatures. This dynamic adjustment maintains high data accuracy across temperature ranges while adding minimal complexity through simple temperature-based voltage selection.
Data Source
AI summary
Methods and systems for improving the reliability of data stored within a semiconductor memory over a wide range of operating temperatures are described. The amount of shifting in the threshold voltages of memory cell transistors over temperature may depend on the location of the memory cell transistors within a NAND string. To compensate for these variations, the threshold voltages of memory cell transistors in the middle of the NAND string or associated with a range of word lines between the ends of the NAND string may be adjusted by increasing the word line voltages biasing memory cell transistors on the drain-side of the selected word line when the read temperature is greater than a first threshold temperature and/or decreasing the word line voltages biasing memory cell transistors on the source-side of the selected word line when the read temperature is less than a second threshold temperature.


