Power Control Feedback via Vref Pin PWM

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Solution Overview

Problem

Existing power management systems face challenges in efficiently communicating power control feedback signals, particularly in devices with limited pins, where dedicating two pins for power control signaling is not practical, and there is a need for a method to optimize power consumption while ensuring operational integrity.

Innovation Solution

Implementing a performance monitor that dynamically adjusts the voltage supplied to a device based on real-time operating conditions, using a single line to communicate power control feedback signals, such as by monitoring critical path delay, phase shift, or oscillator frequency, to minimize power consumption without compromising device operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If two pins are dedicated for power control signaling using I2C interface, then power control feedback can be communicated reliably, but device pin count increases which is not practical for devices with limited pins

Engineering Contradiction:
Improvepower control feedback communicationVSAvoidpin count
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the power control feedback signaling function with an existing pin that has a different primary function. Specifically, the Vref pin (which provides reference voltage) is also used to carry power control feedback signals through pulse-width modulation (PWM). This combining of functions allows power control feedback to be communicated without requiring additional pins, thus resolving the contradiction between reliable communication and limited pin count.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The Vref pin is designed to serve multiple functions: it provides reference voltage for analog-to-digital conversion and simultaneously carries power control feedback signals via PWM. This multi-functionality allows a single pin to perform what would traditionally require two pins, eliminating the need for dedicated power control signaling pins while maintaining communication reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If a single line power control feedback signal is used to drive a single input pin, then pin count is reduced, but the ability to communicate detailed power control information is limited

Engineering Contradiction:
Improvepin countVSAvoidpower control feedback information
Core Design Contradiction:
Device complexityVSLoss of information

Solution Approach 1:

The patent employs periodic pulse-width modulation (PWM) to encode power control feedback information on the single Vref pin. Instead of using continuous analog signals or multi-bit parallel data, the system uses periodic switching of the Vref pin between high and low states, where the duty cycle of these pulses encodes the feedback information. This periodic action allows rich information to be transmitted through a single pin over time, resolving the contradiction between pin count and information transmission capability.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS7797083B1Communicating a power control feedback signal
Publication Date: 2010.09.14 RENESAS DESIGN TECH INC
  • US7797083B1 patent drawing
  • US7797083B1 patent drawing
  • US7797083B1 patent drawing

AI summary

Communicating a power control feedback signal from a system is disclosed. In some embodiments, upon determining how to control input power which may be based at least in part, for example, on an in situ measurement of an operating condition in an operating environment, an appropriate symbol is constructed based upon the determination and is transmitted on a single line. In some embodiments, the single line corresponds to the reference voltage of an associated power supply.