Display Wall VRR Synchronization via Master Timing Signals

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Solution Overview

Problem

Display walls with variable refresh rate (VRR) display modules often lose synchronization, leading to visual issues like motion artifacts and image tearing due to the lack of efficient synchronization methods that do not rely on external reference signals or additional hardware.

Innovation Solution

A processing system dynamically synchronizes VRR display modules by adjusting their refresh rates and timing using a master timing signal, eliminating the need for external synchronization signals and additional hardware like house sync receivers and coaxial cables.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If external reference signals and house sync receivers are used to synchronize display modules, then synchronization reliability is improved, but device complexity and cost increase

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Each display module independently generates its own pixel clock signal based on its internal display refresh rate parameters, eliminating the need for external house sync signals and receivers. The modules self-synchronize by autonomously adjusting their timing based on received video data timing information from the video processing unit.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent removes the house sync receiver and external reference signal components from the display module architecture. Synchronization functionality is extracted from external hardware and integrated into the video processing unit through data timing information, simplifying the overall system.

Inventive Principle:
Principle #2Taking out (Extraction)

2Stability of the object's composition

If house sync receivers and coaxial cables are deployed for synchronization, then synchronization stability is improved, but manufacturing cost and system complexity increase

Engineering Contradiction:
Improvesynchronization stabilityVSAvoidease of manufacture
Core Design Contradiction:
Stability of the object's compositionVSEase of manufacture

Solution Approach 1:

The patent replaces the mechanical/electrical house sync signal transmission system (coaxial cables, receivers) with a digital timing information transmission method through existing video data channels. This substitution eliminates physical synchronization infrastructure while maintaining timing stability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The existing video data transmission infrastructure is made multi-functional by using it to carry both video content and timing synchronization information. The same data channels that transmit image data also convey the timing information needed for synchronization, eliminating dedicated sync signal paths.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If fixed refresh rate display modules are used with house sync signals, then synchronization is maintained, but adaptability to variable refresh rates is limited

Engineering Contradiction:
ImprovesynchronizationVSAvoidadaptability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent enables display modules to dynamically adjust their pixel clock generation based on variable refresh rate parameters. Each module can independently modify its timing characteristics in response to changing display requirements, allowing seamless adaptation between different refresh rates while maintaining synchronization through the same timing information mechanism.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12437732B2Display wall synchronization using variable refresh rate modules
Publication Date: 2025.10.07 ATI TECHNOLOGIES ULC
  • US12437732B2 patent drawing
  • US12437732B2 patent drawing
  • US12437732B2 patent drawing

AI summary

A processing system synchronizes the display of a frame of video at an array of variable refresh rate (VRR) display modules of a display wall by dynamically adjusting a frequency and phase of the refresh rates of the VRR display modules via network protocols based on a selected master timing signal. The processing system selects a master timing signal and transmits the master timing signal to video processing units (VPUs) that render portions of the frame for display at the VRR display modules. Each VPU adjusts the frequency and phase of the VRR display modules for which it renders portions of the frame based on the master timing signal.