VSHPOP Instruction for Loop Data Dependency

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Solution Overview

Problem

Current computer processor architectures lack instructions that simplify the processing of loops with cross-iterations data dependency, such as the factorial loop, which are common in high-performance computing.

Innovation Solution

The introduction of a VSHP{OP} instruction that shuffles data elements and performs operations on them, allowing for efficient execution of loops with data dependency by using a destination vector register, source vector registers, an immediate value, and an opcode to shuffle and operate on data elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional processor instructions are used to process loops with cross-iterations data dependency, then the processing can be performed, but the execution efficiency is low and the instruction complexity increases

Engineering Contradiction:
Improveloop processing efficiencyVSAvoidinstruction complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent combines the shuffle operation and the arithmetic operation into a single VSHP{OP} instruction. This merged instruction performs both the data reordering (shuffle) and the computational operation (add, subtract, multiply, divide, etc.) in one execution step, thereby improving loop processing efficiency while reducing the number of instructions that need to be executed.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The VSHP{OP} instruction is designed as a universal instruction that can handle multiple operations. The opcode field allows selection of different arithmetic operations (addition, subtraction, multiplication, division, fused multiply-add, etc.), and the shuffle amount can be dynamically specified. This multi-functional design reduces instruction complexity by replacing multiple specialized instructions with one versatile instruction.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple separate instructions are used to shuffle and operate on data elements, then the operations can be completed, but the number of instructions increases and execution time increases

Engineering Contradiction:
Improvedata processing speedVSAvoidinstruction execution time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent merges the shuffle instruction and the arithmetic instruction into a single VSHP{OP} instruction. Instead of executing a shuffle instruction followed by an arithmetic instruction (two separate execution steps), the combined instruction performs both operations in one execution cycle, thereby reducing instruction execution time and improving data processing speed.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shuffle operation is performed as a preliminary action within the same instruction that performs the arithmetic operation. The data elements are shuffled (reordered) and immediately operated upon without requiring a separate instruction fetch and execution cycle, thus eliminating the time loss associated with sequential instruction execution.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9218182B2Systems, apparatuses, and methods for performing a shuffle and operation (shuffle-op)
Publication Date: 2015.12.22 INTEL CORP
  • US9218182B2 patent drawing
  • US9218182B2 patent drawing
  • US9218182B2 patent drawing

AI summary

Embodiments of systems, apparatuses, and methods for performing in a computer processor a data element shuffle and an operation on the shuffled data elements in response to a single data element shuffle and an operation instruction that includes a destination vector register operand, a first and second source vector register operands, an immediate value, and an opcode are described.