VT-Programmable Delay Circuit Without External Control Bits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing programmable delay circuits in integrated circuits rely on externally stored binary control bits to adjust signal delay, which limits flexibility and adaptability to process variations and other operational needs.
Innovation Solution
A programmable delay structure with VT-programmable transistors, such as FEFETs or CTFETs, that can switch between low and high threshold voltages, allowing for adjustable signal delay without external control bits by connecting or disconnecting capacitors to the output node based on the transistor's voltage state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If externally stored binary control bits are used to adjust signal delay, then the delay amount can be selectively adjusted, but the flexibility and adaptability to process variations are limited
Solution Approach 1:
The delay circuit performs self-adjustment by sensing its own output signal characteristics and automatically modifying the delay amount through feedback control, eliminating the need for external control bits and enabling automatic adaptation to process variations
Solution Approach 2:
The circuit incorporates a feedback mechanism where the output signal is sensed and used to control the delay element, creating a closed-loop system that automatically adjusts the delay to maintain optimal performance despite process variations
2Ease of operation
If programmable delay circuits are controlled digitally by externally stored binary control bits, then the delay amount can be adjusted, but the circuit operation becomes less responsive to operational needs
Solution Approach 1:
The delay circuit autonomously adjusts its own delay parameter based on real-time sensing of its output signal, eliminating the need for external control mechanisms and enabling immediate responsiveness to operational conditions
Solution Approach 2:
The feedback mechanism continuously monitors the output signal and continuously adjusts the delay parameter, ensuring uninterrupted optimal performance rather than discrete step-based adjustments
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables flexible and adaptive signal delay adjustment within integrated circuits, improving circuit operation by eliminating the need for external control bits and enhancing responsiveness to process variations and operational requirements.
Implementation Method 1
a VT-programmable transistor with source/drain regions connected to the output node and the capacitor such that the capacitor is electrically connectable to the output node through the VT-programmable transistor. The VT of the VT-programmable transistor is programmable so that it is either low or high
Data Source
AI summary
A programmable delay structure includes at least one delay stage, each including an inverter connected between input and output nodes, a threshold voltage (VT)-programmable transistor, and a capacitor connectable to the output node through the transistor. During program mode operations, the transistor is programmed to have a low or high VT. During delay mode operation, the gate voltage is set between the low and high VTs. If the transistor has the low VT, the capacitor is connected to the output node and signal delay is increased. If the transistor has the high VT, the capacitor is not connected to the output node and signal delay is not increased. Illustrated embodiments include additional components for facilitating program mode and delay mode operations. Illustrated embodiments also include multiple delay stages where the output node of one stage is connected to the input node of the next. Also disclosed are associated operating methods.