Voltage-to-Time Converter Compensation for Parasitic Capacitance

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Solution Overview

Problem

Traditional voltage-to-time converters are limited by parasitic capacitance and power supply voltage disturbances, which restrict the differential voltage swing amplitude and conversion performance, especially for small input voltage amplitudes.

Innovation Solution

A voltage-to-time converter design incorporating a main sampling network, a compensation sampling network, and an over-threshold detection unit, where the compensation sampling network compensates for parasitic capacitance and power supply influences by simultaneously sampling and converting input voltage differences, reducing the impact of parasitic capacitance and power supply voltage fluctuations on the threshold detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the sampling capacitor is time-division multiplexed by other modules, then the sampling capacitor size is strictly limited and the value is small, but the parasitic capacitance influence seriously limits the differential voltage swing amplitude at the input end of the over-threshold detection unit

Engineering Contradiction:
Improvesampling capacitor valueVSAvoiddifferential voltage swing amplitude
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The patent introduces a bootstrapped common-mode level circuit as an intermediary mechanism that actively compensates for parasitic capacitance effects. This circuit generates a dynamic common-mode voltage that tracks and cancels the parasitic voltage drops, thereby maintaining sufficient differential voltage swing at the over-threshold detection unit input despite small sampling capacitor values

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent dynamically changes the common-mode voltage level through the bootstrapped circuit to compensate for parasitic capacitance effects. By adjusting the common-mode level in real-time during different operating conditions, the circuit maintains optimal differential voltage swing amplitude even when sampling capacitor values are constrained by time-division multiplexing

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the threshold of the over-threshold detection unit is related to the power supply voltage, then the threshold level is affected by voltage disturbances, but the VTC conversion performance is reduced and the application in small swing amplitude input voltage is limited

Engineering Contradiction:
Improvepower supply voltage relationshipVSAvoidVTC conversion performance
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the bootstrapped common-mode level circuit continuously monitors and adjusts the common-mode voltage to counteract power supply voltage disturbances. This feedback loop ensures that the threshold detection performance remains stable and accurate even when the power supply voltage fluctuates, preventing degradation of VTC conversion performance

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent uses the bootstrapped common-mode level circuit to maintain equipotential conditions by dynamically adjusting the common-mode voltage to match and cancel out power supply disturbances. This creates a stable reference potential that is immune to power supply fluctuations, ensuring consistent threshold detection performance across varying power supply conditions

Inventive Principle:
Principle #12Equipotentiality

Data Source

PatentUS11115039B2Voltage-to-time converter and method for reducing parasitic capacitance and power supply influences
Publication Date: 2021.09.07 CETC CHIPS TECH GRP CO LTD
  • US11115039B2 patent drawing
  • US11115039B2 patent drawing

AI summary

The present disclosure provides a voltage-to-time converter and method for reducing parasitic capacitance and power supply influences. The voltage-to-time converter includes: a main sampling network, a compensation sampling network, a discharge network and an over-threshold detection unit. The influence of a traditional VTC parasitic capacitance on a VTC output swing amplitude is reduced by using the compensation sampling network. A sampling common-mode level of the compensation sampling network is compensated, such that the influence of the low-frequency disturbance of a power supply voltage on a threshold of a traditional VTC threshold detection circuit is reduced. The output swing amplitude of the voltage-to-time converter of the present disclosure can reduce the influence of a parasitic capacitance. A voltage common-mode level of a VTC input end is related to a power supply voltage, which reduces a conversion error caused by the influence of the power supply voltage on a threshold.